Implementation of FFT Algorithm Based on IP Core

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Abstract:

—In this paper, we propose a new way to implement the FFT Algorithm, which based on FPGA. At first we introduce the theory of FFT algorithm and its applications. Then the features of FFT IP core based on Altera FPGA is discussed. We elaborate the usage method of the customizable Altera FFT MegaCore function. A logic state machine is designed to create some command signals of this FFT IP core. Finally we use simulation tools Signal-Tap in quartus II inviroment to simulate and debug our FFT control module’s function. The result shows that this new control method of FFT IP core is feasible.

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426-430

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Online since:

July 2014

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FFT, FPGA, IP

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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