Implementation of Single Phase Locked Loop Based on FPGA and its Application in SVC

Abstract:

Whereas three-phase phase locked loop could not get accurate phase position under three-phase unbalanced condition of the power grid, the design of single phase locked loop is implemented in the principle of single phase locked loop, based on FPGA technology. the paper explains design difficulties of single phase locked loop in detail, puts forward adaptive sampling scheme using single phase locked loop under variable frequency, increases accuracy of SVC sampling system. And tests response speed of phase locked loop via Real Time Digital Simulator for Power Systems (RTDS), through final verification in Fushun Lishizhai SVC Project, the design could meet system requirement for voltage phase accuracy.

• Periodical: Advanced Materials Research (Volumes 986-987)
• Pages: 1826-1832
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.986-987.1826
• Online since: July 2014
• Authors: Yu Jie Pei*, Yun Shan Zhang, Jian Guo Xu, Jing Long Mu, Lei Zhang, Pin Dong, Bo Cong, Shu Han Wang
• Keywords: Adaptive Sampling, FPGA, RTDs, Single Phase Locked Loop, Three-Phase Unbalance

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