Advances in Science and Technology Vol. 54

Abstract: In this paper emphasis is placed on the wet micromachining of silicon micro-arrays constituted by very small holes. Microfabrication of various Silicon plates is performed in a KOH etchant maintained at constant temperature. Limitations due to the process are given. A self elaborated simulator is used to predict etching shapes of several micro holes. A comparison between experiments and simulation is presented.

Abstract: We present a concept for integration of low temperature fabricated memory devices in a 3-D architecture using a hybrid silicon-organic technology. The realization of electrically erasable read-only memory (EEPROM) like device is based on the fabrication of a V-groove SiGe MOSFET, the functionalization of a gate oxide followed by self-assembly of gold nanoparticles and finally, the deposition of an organic insulator by Langmuir-Blodgett (LB) technique. Such structures were processed at a temperature lower than 400°C following a process based on wafer bonding. The electrical characteristics of the final hybrid MISFET memory cells were evaluated in terms of memory window and program/erase voltage pulses. A model describing the memory characteristics, based on the electronic properties of the gate stack materials, is presented.

Abstract: Non volatile memory devices have been developed using diphenyl bithiophene derivatives (DPBT) as active layer. The devices, developed with a two terminal vertical structure where the spin cast organic layer is sandwiched between two electrodes, behave as bistable conductance switching memory cells; the modification of the electrodes material and of the organic layer composition introduces significant changes in the electrical behaviour, that give some indications on the molecular origin of the electrical bistability. These data are enriched by in-situ spectroscopic experiments.

Abstract: CuTCNQ is a charge transfer complex displaying resistive electrical switching when sandwiched between Cu and Al contacts. Corresponding memory cells switch from a native high resistive OFF state (HRS) to a low resistive ON state (LRS) by applying a negative voltage to the Al with respect to the Cu. Inversion of the signal polarity leads to switching from the LRS to the HRS. Typical CuTCNQ preparation occurs by a chemical reaction of a Cu substrate with TCNQ, involving (partial) corrosion of the metal. In this contribution we present electrodeposition of CuTCNQ on Au and Pt substrates, leading – in contrast to previously published dendritically crystal growth – to relatively smooth, micrometer thick layers. Corresponding large area cross-bar memory arrays (200€m by 200€m, with Al top contacts) exhibited up to several thousand write/erase cycles with an ON/OFF current ratio of 5-10. Furthermore preliminary growth experiments with blanket tungsten bottom contact Metal–Oxide–Semiconductor (CMOS) wafers with 250 nm diameter contact holes showed that electrodeposition is a suitable method for CuTCNQ integration.

Abstract: We have studied the effect of various electrodes on non-volatile polymer memory devices. The ITO/PEDOT:PSS/Top electrode (TE) devices had bipolar switching behavior. The OFF current level of devices increased from 3×10-4 A to 3×10-3 A and the ON voltage decreased from 0.8 V to 0.5 V as the TE work function increased. The yield of devices decreased from over 50 % to under 10 % as the TE work function of devices increased. This result occurred because carrier injection was affected by the TE work function.

Abstract: There is a current upsurge in research on devices with nanoparticles embedded in dielectrics. Such structures can operate as memories with high speed, high density, low voltage and low cost. Here, we report on hybrid gold nanoparticle-based metal-insulator-semiconductor (MIS) memory devices combining silicon technology and organic thin film deposition. The nanoparticles are deposited using a self-assembly technique at room temperature onto a 4.5 nm thermal silicon oxide layer. A 40 nm thin film of pentacene (deposited by flash thermal evaporation), polymethylmethacrylate (spin coated) and cadmium arachidate (deposited using the Langmuir- Blodgett technique) are used as insulators. Distinct capacitance-voltage (C-V) hysteresis is observed with a memory window that increases linearly with increasing voltage programming range. Clockwise and anticlockwise hysteresis in devices based on p-type and n-type silicon, respectively are observed, indicating that charges are injected from the top electrode to the nanoparticles rather than tunnelling through the thin SiO2 layer. However, thermal growth of SiO2 at a temperature below 800 °C resulted in a hysteresis in the opposite direction. The detailed electrical behaviour of the MIS devices will be discussed.

Abstract: Organic and polymer based electronic devices are currently the subject of a great deal of scientific investigation and development. This interest can be attributed to the low cost, easy processing steps and simple device structures of organic electronics when compared to conventional silicon and inorganic electronics. In the field of organic electronic memories, non-volatile, rewritable polymer memory devices (PMDs) have shown promise as a future technology where cost and compatibility with flexible substrates are important factors. In this paper PMDs based on active layers containing an admixture of polystyrene, gold nanoparticles and 8-hydroxyquinoline will be presented, showing the devices’ electrical characteristics and memory performance attributes, and where possible discussing possible mechanisms of operation.

Abstract: Intensive research is currently underway to exploit the highly interesting properties of nano-sized particles and organic molecules for optical, electronic and other applications. Recently, it has been shown that nano-sized particles and small organic molecules embedded in polymer matrices can be used to realise memory devices. Such memory devices are simple to fabricate via the spin-on technique. This work presents an attempt to use sea salt, embedded in polyvinyl acetate, in the making of the memory devices. A polymer blend of polyvinyl acetate and sodium chloride (NaCl) was prepared in methanol and spin coated onto a glass substrate marked with thin Al tracks and a top contact was evaporated onto the blend after drying - this resulted in a metal-organic-metal (MOM) structure. The current-voltage (I-V) behaviour of MOM devices shows that the devices can be switched from a high conductivity state to a low conductivity state, by applying an external electric field - this property can be exploited to store data bits. The possible charging mechanism, based on the electric dipole formation, is presented in this work. Polymer blends of polyvinyl acetate with nano-particles of BaTiO3 are also investigated to further our understanding of charging mechanism(s).

Abstract: In this study, the dipole switching and non-volatile memory functionality of poly(vinylidene fluoride-trifluoroethylene) (PVDF/TrFE)(72/28 mol%) random copolymer ultrathin films were analyzed. PVDF/TrFE(72/28) used as ferroelectric insulator in varying memory device architectures such as metal-ferroelectric polymer-metal (MFM), MF-insulator-semiconductor (MFIS), MIS and ferroelectric field-effect transistors (FeFET) were examined using different electrical measurements. A maximum data writing speed of 1.69 MHz was calculated from the switching time measured using MFM architecture. Compared to MFM, MFIS device architecture was found to be more suitable for distinguishing the ‘0’ and ‘1’ state using the capacitance-voltage measurement. With FeFET, the measured drain current (Id) as well as its memory window increased with decreasing channel length, thereby enabling the easier identification of ‘0’ and ‘1’ state comparable to the MFIS case. The data obtained from this study will be useful in the fabrication of non-volatile random access memory (NVRAM) devices operating at lower voltage with faster data R/W/E speed and memory retention capability.