Papers by Author: Vijay Balakrishna

Abstract: Availability of high-quality, large diameter SiC wafers in quantity has bolstered the commercial application of and interest in both SiC- and nitride-based device technologies. Successful development of SiC devices requires low defect densities, which have been achieved only through significant advances in substrate and epitaxial layer quality. Cree has established viable materials technologies to attain these qualities on production wafers and further developments are imminent. Zero micropipe (ZMP) 100 mm 4HN-SiC substrates are commercially available and 1c dislocations densities were reduced to values as low as 175 cm-2. On these low defect substrates we have achieved repeatable production of thick epitaxial layers with defect densities of less than 1 cm-2 and as low as 0.2 cm-2. These accomplishments rely on precise monitoring of both material and manufacturing induced defects. Selective etch techniques and an optical surface analyzer is used to inspect these defects on our wafers. Results were verified by optical microscopy and x-ray topography.

Abstract: Recent advances in PVT c-axis growth process have shown a path for eliminating micropipes in 4HN-SiC, leading to the demonstration of zero micropipe density 100 mm 4HN-SiC wafers. Combined techniques of KOH etching and cross-polarizer inspections were used to confirm the absence of micropipes. Crystal growth studies for 3-inch material with similar processes have demonstrated a 1c screw dislocation median density of 175 cm-2, compared to typical densities of 2x103 to 4x103 cm-2 in current production wafers. These values were obtained through optical scanning analyzer methods and verified by x-ray topography.

Abstract: We have developed a horizontal hot-wall reactor for growing extremely uniform epilayers on 100-mm diameter SiC substrates using a novel supplemental reagent source. Doping and thickness variations of 2% and 1% s / mean, respectively, have been demonstrated. The typical defect density is 2 cm-2. We describe the growth cell in detail and discuss the development of the design and process to produce these very uniform epilayers.

Abstract: The development of SiC bulk and epitaxial materials is reviewed with an emphasis on epitaxial growth using high-throughput, multi-wafer, vapor phase epitaxial (VPE) warm-wall planetary reactors. It will be shown how the recent emergence of low-cost high-quality 100-mm diameter epitaxial SiC wafers is enabling the economical production of advanced wide-bandgap Power–Switching devices.

Abstract: We detail a comprehensive approach to preparing epiwafers for bipolar SiC power devices which entails etching the substrate, growing a semi-sacrificial basal plane dislocation (BPD) conversion epilayer, polishing away a portion of that conversion epilayer to recover a smooth surface and then growing the device epilayers following specific methods to prevent the reintroduction of BPDs. With our best processing, we achieve a BPD density of < 10 cm-2 and an extended defect density of < 1.5 cm-2. Specifics of low BPD processing and particular concerns and metrics will be discussed in regard to process optimization and simplification.