Papers by Keyword: High Temperature Operation

Abstract: In the conventional SiC-MOSFET, a PN junction diode is included between the source and drain. This P-N junction diode not only causes device degradation, but also generates a large reverse recovery surge voltage during high temperature operation. This surge voltage increases the electrical stress of the power converter, causing dielectric breakdown and control malfunction. We have developed a SBD integrated SiC-MOSFET. This MOSFET reduces the occurrence of reverse recovery surge voltage during high-temperature operation caused by inactivating the included PN junction diode. In this paper, we discuss the characteristics of the inverter composed of the developed SiC-MOSFET in high-temperature operation. As a result, the inverter using a SBD integrated SiC-MOSFET with the PN junction diode deactivated was able to reduce surge voltage at high temperature operation.

Abstract: Characteristics of 4H-SiC nMOSFETs with arsenic-doped S/D and NbNi silicide contacts in harsh environments of high-temperature up to 450°C, and high gamma-ray radiation up to over 100 Mrad, were investigated. At high temperature, field effect mobility increased as proportional to T^3/2, and threshold voltage was shifted with temperature coefficients of -4.3 mV/K and -2.6 mV/K for oxide thicknesses of 10 nm and 20 nm, respectively. After Co60 gamma-ray exposure of 113 Mrad, the field effect mobility was varied within 8% for oxide thickness of 10 nm, however for 20 nm oxide thickness, this variation was 26%. The threshold voltage shifts were within 6%.

Abstract: Because of the superior material properties of diamond, high performance in high-temperature power device application is demonstrated in both the computational and the experimental studies. A calculated Baliga limit of diamond Schottky barrier diode (SBD) based on 1D model indicates that an increase in on-resistance is highly expected within the high blocking voltage region and will be remarkable at high temperature conditions. Because of the high barrier height of diamond SBDs, the reverse leakage current is suppressed even at high temperatures. From the high-temperature stability test, stable interfaces of metal/diamond contact with constant Schottky barrier height have been confirmed. The SBD works for more than 1500 hrs at 400oC.

Abstract: Normally-off 4H-SiC MOSFETs are used to build NMOS logic gates intended for high temperature operation. The logic gates are characterized between 25°C and 500°C. Stable gate operation for more than 200h at 400°C in air is demonstrated. The excellent MOS reliability is quantified using I-V curves to dielectric breakdown and constant voltage stress to breakdown at 400°C. Although the effective tunneling barrier height B for electrons lowers to 2eV at 400°C, the extrapolated lifetime from constant voltage stress to breakdown measurements is longer than 105h at 400°C for typical logic gate operating field strength of 2MV/cm.

Abstract: In this paper we report the electrical and thermal performance characteristics of 1200 V, 100 A, 200°C (Tj), SiC MOSFET power modules configured in a dual-switch topology. Each switch-diode pair was populated by 2 x 56 mm2 SiC MOSFETs and 2 x 32 mm2 SiC junction barrier Schottky (JBS) diodes providing the 100 A rating at 200°C. Static and dynamic characterization, over rated temperature and power ranges, highlights the performance potential of this technology for highly efficient drive and power conversion applications. Electrical performance comparisons were also made between SiC power modules and equivalently rated and packaged IGBT modules. Even at a modest Tj=125°C, conduction and dynamic loss evaluation for 20kHz, Id=100A operation demonstrated a significant efficiency advantage (38-43%) over the IGBT components. Initial reliability data also illustrates the potential for SiC technology to provide robust performance in harsh environments.

Abstract: We report fabrication of lateral, n-channel, depletion-mode, junction-field-effect-transistor (JFET) monolithic analog integrated circuits (ICs) in 6H-SiC. Ti/TaSi2/Pt forms the contact metalization, Ti/Pt the interconnect metal, and the SiO2/Si3N4/SiO2 interlayer dielectric. The threshold voltage and pinch off current indicate that the actual channel doping and thickness is close to the nominal values specified. The wafer yield for good circuits of a single-stage differential amplifier is 54% out of 46 copies.

Abstract: The 1.2 kV 4H-SiC buried-grid vertical JFET structures with Normally-on (N-on) and Normally-off (N-off) design were investigated by simulations. The conduction and switching properties were determined in the temperature range from -50°C to 250°C. In this paper, the characteristics of the N-on designs with threshold voltage (Vth) of -50 V and -10 V are compared with the N-off design (Vth=0). The presented data are for devices with the same channel length at 250°C. The results show that the on-resistance (Ron) decreases with increasing channel doping concentration and decreasing channel width. The presented turn-on, Eon, and turn-off, Eoff, energies per pulse are calculated under the switching conditions 100 A/cm2 and 600 V with a gate resistance of Rg=1
. For the two N-on designs the total switching losses, Esw=Eon+Eoff, differ less than 30% with Wch  0.7 m. With Wch=0.5 m the switching losses of N-off design are almost one order of magnitude higher than those of the N-on design with Vth = -50 V.

Abstract: In order to facilitate the circuit design and simulation at extreme temperatures, APEI, Inc. fully characterized a custom-built SiC VJFET transistor at temperatures up to 525 °C and built a Spice model based on the characterization data. The temperature effects were also formulized in this Spice model to ensure its uniform applicability over the entire temperature range. Test circuits of a differential amplifier and a multivibrator were built and tested from room temperature up to 450 °C to validate the proposed SiC JFET model, which could be widely applied in Spice based circuit simulation packages.

Abstract: In this paper a wire-bond technology for high temperatures (up to 500°C) based on silver-wire is presented. The mechanical properties of silver thick-wire wedge bonds are analyzed and compared to previously presented silver-stripes fastened onto the chip with the Low Temperature Joining Technique (LTJT) and to common aluminum thick-wire.

Abstract: In this paper a die-attachment technology for high temperature applications based on the Low Temperature Joining Technique (LTJT) is presented. The present challenge is to fit the thermal expansion as well as the mechanical properties of the die-attach layer to the characteristics of chip and substrate. While the classic LTJT is based on sintering a sub-micron silver paste at temperatures between 150°C and 300°C to bond an electronic device to a substrate, the modified procedure employs a powder mixture consisting of silver powder and special filling powder material. Type and amount of the filling material is dependent on the application and the used substrates. Considering a low thermal expansion and high electrical as well as thermal conductivity we chose SiC, TiC, and BN as filling materials in this work.