Papers by Keyword: Low-k Dielectric

Abstract: Porous ultra low constant materials (ULK) for isolation within the interconnect system of integrated circuits are a promising approach to reduce crosstalk and RC-delays due to shrinking feature sizes [1]. Due to their porosity and the integration of carbon rich species like methyl groups into the Si-O-Si backbone of currently fabricated PECVD SiCOH dielectrics those materials are highly sensible towards plasma processing, e.g. dry etching or resist stripping [2]. Metal hard mask approaches, e.g. using TiN hard masks are widely used to prevent the resist stripping plasma directly attacking the low-k material [3]. To reduce further plasma damage like carbon depletion and formation of polar silanol groups the development of less aggressive etching processes is in the focus of research and development activities. Nevertheless dry etching will attack the sidewalls and cause a material degradation. That is why repair processes, mainly based on silylation, are considered to follow the patterning step to reintegrate carbon rich species and to recover the dielectric’s properties [3]. Subsequently to dry etching and repairing the dielectric the wet chemical plasma etch residue removal process is performed. Besides material compatibility and effectiveness in residue removal the wetting behavior of the applied cleaning solutions towards the surface which has to be cleaned is crucial, especially looking on wetting issues like the incomplete wetting of very small via holes or pattern collapse. In this study we investigate in which way different silylation based repair processing regimes are affecting the wettability of the dielectric by water based cleaning solutions using contact angle based surface energy calculations.

Abstract: Scaling down the integrated circuits has resulted in the arousal of number of problems like interaction between interconnect, crosstalk, time delay etc. These problems can be overcome by new designs and by use of corresponding novel materials, which may be a solution to these problems. In the present paper we try to put forward very recent development in the use of novel materials as interlayer dielectrics (ILDs) having low dielectric constant (k) for CMOS interconnects. The materials presented here are porous and hybrid organo-inorganic new generation interlayer dielectric materials possessing low dielectric constant and better processing properties.

Abstract: Ab initio molecular dynamics simulations were carried out to study low-k/ultra low-k dielectric systems comprising Cu/Ta/SiLK-like polymer. A study of the motion of single metal atoms of Cu and Ta in the SiLK-like polymer showed that Cu atom motions are effected by jumps between cavities inside the polymer and that Ta is more sluggish than Cu not only because of its larger mass but also because of stronger affinity to the polymer. It was also found that crosslinking of the polymer did not affect the motion of the metal atoms. Simulations of deposition showed that a thin Ta diffusion barrier does not have good structural integrity to prevent Cu-diffusion when directly deposited onto the SiLK; the barrier performance was greatly improved after introducing a Si-based film between the Ta and SiLK.

Abstract: We implanted 300keV Xenon in silicon oxide at doses ranging from 1x1016 to 5x1016/cm2. For the first time, we reported the formation and the thermal evolution of bubbles/cavities in SiO2. Characterization by cross-section transmission electron microscopy (XTEM) and Rutherford backscattering spectrometry (RBS) showed that bubbles/cavities remain present even after a 1100°C annealing, while Xe strongly desorbs out at that temperature. Our measurements provides unexpected dielectric constant (k) lower than 1.6. These results make this technique very attractive for low-k applications in Si technology. Keywords: low-k dielectric, rare gas implantation, silicon oxid.