Papers by Keyword: SIT

Abstract: Stress tests were conducted for the cascode switch using the SiC buried gate static induction transistor (SiC-BGSIT). The stress of the reverse overshoot voltage was periodically applied to the pn junction between the gate terminal and source one in the BGSIT in the cascode with pulses of 40kHz for 202 hours. This simulates the stress which can be occurred in the channel region of the BGSIT during the turn-off and turn-on operation with a parasitic inductance in the interconnection of the cascode package. The result of the stress tests has revealed that there is no significant difference between the electrical characteristics of the BGSIT cascode sample before the stress and those after the stress. Thus, the BGSIT cascode can guarantee high reliability against the stress. The result from the drain current DLTS suggests that no deferent kind of defect is created in the channel region of the BGSIT by the stress.

Abstract: Wide bandgap semiconductors, such as 4H SiC, are suitable for power regulating devices, due to compatibility with conventional process integration, high breakdown voltage and thermal conductivity [1]. For RF applications, in order to achieve better switching speed, high cut off frequency, and low series resistance (Rdson), it is essential to choose the right gate metals [2]. Engineering of the gate metals not only improves the critical device parameters by adjustment of the metal workfunction, but also affects how the high aspect ratio trenches are filled for a next generation SIT device configuration [3] - [5].

Abstract: With the development of offshore oil and gas field enters into deep water constantly, subsea production system has become the main development mode in deep water development. Subsea Inline manifold (ILM) is common facilities in subsea production system and is used to gather oil and gas from the side subsea wells. Two subsea ILMs has been adopted in Panyu 35-1/35-2 Gas field with water depth range from 194 to 338 m in South China Sea. System integration test (SIT) is very important for the subsea production facilities. This paper states the flow chart, master equipment, purpose and precautions for each test of ILM SIT, which collects great technology for the development of subsea production system.

Abstract: Silicon carbide (SiC) static induction transistors (SITs) were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). The mesa space designed is 2.5 μm and the gate channel is 1.0 μm. The developed devices adopted a p-type Al ion implanted gate and power performance was improved by decreased leakage current and enhanced break-down voltage. The lift-off with assistant dielectric, dense gate recess etching, high temperature anneals and PECVD passivation process technologies are adopted. One cell has 200 source fingers and each source finger width is 50 μm. 0.5 mm SiC SIT yield a current density of 110 mA/mm at a drain voltage of 50 V. A maximum current density of 160 mA/mm was achieved with Vd = 80V, and the maximum transconductance is 40mS/mm. The device blocking voltage with a gate bias of-12 V was 400 V. Packaged 2 × 2-cm devices were evaluated using amplifier circuits designed for class AB operations. A total power output in excess of 70 W was obtained with a power density of 17.5 W/cm and gain of 5.5 dB at L band 1 GHz under pulse 100μs and cycle ratio 1% RF operation and 80V drain to source voltage.

Abstract: . Silicon carbide (SiC) SITs were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). We designed that the mesa space 2.7μm and the gate channel is 1.2μm. One cell has 400 source fingers and each source finger width is 100μm. 1mm SiC SIT yielded a current density of 123mA/mm of drain current at a drain voltage of 20V. A maximum current density of 150 mA/mm was achieved with Vd=40V. The device blocking voltage with a gate bias of-16 V was 200 V. Packaged 24-cm devices were evaluated using amplifier circuits designed for class AB operations. A total power output in excess of 213 W was obtained with a power density of 8.5 W/cm and gain of 8.5 dB at 500 MHz under pulse operation.

Abstract: Buried gate static induction transistors (BGSITs) were fabricated on commercial 4H-SiC wafer with 20 m thick n-type epilayer having a net donor density of 0.71015 cm-3. Buried gate regions were formed by the selective implantation of high energy (up to 2 MeV) aluminium performed at 600 °C. Nitrogen was implanted at temperature of 400 °C to form a heavily doped blanket source region. Post-implantation annealing was carried out at the atmospheric pressure in argon using a graphite capping layer. Fabricated normally-on devices with source contact diameter of 0.2 mm were tested at temperatures up to 500 °C and current densities up to 270 A/cm2. The specific on-resistance of a completely open 4H-SiC BGSIT was 34 mcm2 and showed a thermally activated behaviour at temperatures up to 500 °C.