Papers by Keyword: Short-Channel

Abstract: Short-channel under TaCN/La₂O₃ gate structure SOI NMOSFET has been studied in this paper, contrast with the traditional gate structure gate leakage current and others electrical properties, using TaCN/La₂O₃ gate structure，significantly improved short-channel device performance etc. Additionally, the gate structure in the L=40nm, 30nm and 20nm of C-V characteristic and output characteristic are also studied; all the simulation results coincide with the theoretical analysis.

Abstract: A review of recent results concerning the DC characterization of FD- and Double Gate SOI MOSFET’s and FinFETs in modern CMOS technologies is given. By proper extraction techniques, distinction between the different interaction mechanisms is done. Parameter extraction conducted at room and low temperature clearly indicates that the mobility is directly impacted by shrinking the gate length in sub 100nm architectures.

Abstract: To conduct analyses of variability of threshold voltage (Vth) in FinFETs whose structures are based on the ITRS, sensitivity coefficients of variations of Vth caused by the fluctuation of principal device parameters were derived by device simulation. The sensitivity coefficient correlated with each device parameter was separated into two factors: one due to an intrinsic mechanism (1D factor) and another due to short-channel effects (2D factor). The 1D and 2D factors were found to cancel each other out in some cases, thereby reducing the sensitivity coefficient. Based on these results, FinFETs with various structures were examined and controlling short-channel effects was demonstrated to be an effective way to reduce the variation in the threshold voltage.

Abstract: In this paper the formation strategies for source and drain regions in vertical FinFETs are discussed. The technology challenges are very different than for planar bulk devices. Here the main doping approaches are presented with their advantages and drawbacks. Source/drain formation by ion implantation, and deposition techniques are discussed with respect to process simplicity, and device requirements.

Abstract: Recent work on the thermal and electrical challenges in realizing AlGaN/GaN microwave heterojunction field effect transistors grown on SiC substrates is discussed. Raman thermography has been used to directly measure the self-heating induced lattice temperature rise with dramatically improved resolution and accuracy compared to traditional infrared techniques. It is demonstrated that defects in the SiC substrate can influence the temperature distribution within the active device with potential consequences for reliability. Microwave devices require an insulating GaN substrate material for device isolation. It is shown that the net deep level acceptor concentration has to be accurately controlled to suppress short-channel effects and to achieve radio frequency power efficient operation.

Abstract: Short-channel effects in SiC MOSFETs have been investigated. Planar MOSFETs with various channel lengths have been fabricated on p-type 4H-SiC (0001), (000-1) and (11-20) faces.^Short-channel effects such as punchthrough behavior, decrease of threshold voltage and deterioration of subthreshold characteristics are observed. Furthermore, the critical channel lengths below which short-channel effects occur are analyzed as a function of p-body doping and oxide thickness by using device simulation. The critical channel lengths in the fabricated SiC MOSFETs are in agreement with those obtained from the device simulation. The results are also in agreement with the empirical relationship for Si MOSFETs.