Papers by Keyword: Ultra Low-k

Abstract: Pattern collapse phenomenon was first time observed in BEOL application with the integration of ultra low-k film scheme. With the dimension and pitch shrinkage, the pattern collapse defects are getting worse during wet clean process. In this study, the line collapse defects can be significantly reduced by adding surfactant solution to the rinse liquid. Moreover, higher aspect ratio (>4) will also deteriorate the collapse window. In addition, the kink or bowing trench profile will induce localized stress at the interface. Accordingly, optimization of both wet clean and dry etch process are the successful keys to solve line collapse issue toward future generation and beyond.

Abstract: In semiconductor processing, test wafers are used as particle monitors, film thickness monitors for deposition and oxide growth measurements, dry/wet etch rate monitors, CMP monitors, as well as characterizing new and existing equipment and processes. Depending on fab size and capacity, monthly test wafer usage can be tens of thousands or more. Due to the ever increasing demand for silicon between the IC and solar markets and the high cost of 300mm wafers, chip manufacturers are increasing their efforts to reduce overall spending on silicon - currently by far the largest non equipment related cost [1]. One approach taken by many chip makers is the concept of extending the usable life of test wafers by re-using them as many times as possible through a reclaim process.