Papers by Keyword: Ultra Shallow Junction

Abstract: The high demand of smaller and compact size of MOSFETs has leads to desirable for ultra shallow junction formation with low sheet resistance and good electrical performances. These two characteristics are required to suppress short channel effects and to increase the efficiency of device. In this paper, Pre-amorphise implantation (PAI) PMOS with different doses of Boron and the basic PMOS structure are done by using ATHENA and the performance of devices is compared by using ATLAS software package from Silvaco TCAD. Comparison done in electrical characteristic, I-V curve Ion and Ioff has showed PMOS with PAI technology with low boron doses resulted in increasing electrical performance characteristic.

Abstract: An ultra-short pulse laser process is presented that is based on a photon-induced phonon excitation process for low-temperature nano-surface modification of silicon. The present methodology is based on the concept that the energy required for re-crystallization and activation of the implanted dopants is supplied to the dopant layer via a nonequilibrium adiabatic process induced by ultra-short pulse laser irradiation at room temperature. An ultra-short pulse laser beam with a pulse duration of ~ 100 femtoseconds has been used in the present work for the investigation of surface excitation features via pump-probe reflectivity measurements and for demonstrations of room-temperature re-crystallization and activation of ion-implanted silicon substrates.

Abstract: Boron in silicon has presented challenges for decades because of clustering and so-called transient enhanced diffusion [1-2]. An understanding of boron diffusion post rapid thermal annealing in general, and out of in situ doped epitaxially grown silicon-germanium films in particular, is essential to hetero junction engineering in microelectronic device technology today. In order to model boron diffusion, post-implantation, the local density diffusion (LDD) model has been applied in the past [3]. Via mathematical convolution of the diffusion model slope and the initial boron concentration profile, these former results were transferred to this work. In this way, non-diffusing boron was predicted to exist in the center of the presented in situ boron-doped films. In addition, boron diffusion control by co-implanted carbon was demonstrated and the applied LDD model was completed and confirmed by adapting A. Einstein’s proof [4] for this purpose.

Abstract: Boron diffusion after implant and anneal has been studied extensively in the past, without de-convoluting the Boron diffusion behavior by the initial post implant Boron concentration profile, which is done in this work first time. To support the de-convolution approach, the local density diffusion (LDD) model is selected, because this model is based on just one single arbitrary diffusion parameter per atomic species and host lattice combination. The LDD model is used for Phosphorus and Arsenic diffusion so far and an extension to simulate Boron diffusion in presence of Boron clusters is presented here. As the result, maximum Boron penetration depth post different rapid thermal anneals and the quantification of diffusing and clustering (non-diffusing) Boron in silicon and silicon-germanium host lattice systems are given.

Abstract: High dose, ultra shallow junction implant resist strip requires minimal substrate loss and dopant loss. Silicon recess (silicon loss) under the source/drain (S/D) extensions increases the S/D extension resistance and decreases drive currents by changing the junction profile. ITRS surface preparation technology roadmap [1] targets silicon loss to be 0.4Å per cleaning step for 45nm and 0.3Å for 32nm generation. Fluorine-containing chemistries which are often used to enhance implanted resist strip and residue removal result in unacceptable substrate loss. A non-fluorine plasma strip was developed in earlier work and is qualified for 45nm logic production [2]. The objective of this work is to study the substrate damage that is induced by the resist strip plasma process. Silicon surface oxidation and silicon loss of different plasma strip chemistries were evaluated with various metrologies such as optical ellipsometry, electrical oxide measurement, XPS, TEM and mass measurement. The impact of different strip chemistries on dopant retention and distribution is also discussed.

Abstract: The continuous dimensional reduction drives the development of metrology, analysis and characterization for nano and micro electronics. An enormous worldwide R&D effort focuses on the understanding and controlling materials properties and dimensions at atomic level. Crucial for groundbreaking new developments is the availability of appropriate analytical infrastructures providing techniques with information depths well adapted to the nanoscaled objects of interest. This requires widely accessible, independent complementary metrology, analytical techniques, and characterization. For example new materials and the demand of improved detection sensitivities for contaminants provide huge challenges for the capabilities of current analysis equipment and expertise. At the same time, the availability of complementary competences is crucial for advancement of analytical methodologies through cross-comparison, round-robin, and benchmarking of results. This paper describes the formation of an independent analytical infrastructure within Europe having the expertise and competence to solve metrology problems for development of nanotechnologies. Furthermore, a strategy is shown to establish independently operating ‘Golden Laboratories’ for complementary and reliable metrology, analysis, and characterization adapted to the requirements of industrial partners.

Abstract: This paper reports on the ultra-rapid thermal annealing of next generation MOSFETs. In ultra-rapid thermal annealing, the most important issue is to achieve a good balance between electrical activation and impurity diffusion. Another issue of annealing implantation damages is also discussed: Optimized annealing combined with millisecond annealing and conventional halogen lamp annealing is necessary for annealing out defects at end-of range region. Application possibilities of millisecond annealing for deep junction activation and oxidation are also discussed.

Abstract: One of the main materials challenges of the 130 nm silicon technology node was the need to find a processing solution to the anomalous diffusion behavior of ion-implanted dopants known from three decades of research. Reduction of implantation energy no longer proved sufficient when trying to reduce source/drain extension junction depth, increase abruptness, and limit sheet resistance. Spike-annealing, a new process in which ion implanted silicon could be heated rapidly to temperatures required for dopant activation and then cooled down without dwelling at temperature, adequately addressed the scaling requirements of this node. The resulting junctions achieved high dopant concentration values very close to the surface while limiting junction depth. However, this increased the propensity for dopant migration to overlying layers associated with the source/drain spacer. Loss of device performance due to this and other phenomena became a strong motivating factor for further materials research in order to sustain progress through the 130 nm and 90 nm nodes. Complex interactions between various layers have been understood and the resulting developments in spacer materials have enabled high performance devices. The requirements of the 65 and 45 nm nodes stretch spike-annealing to its limit and newer ultra-high temperature anneals must be considered.

Abstract: Millisecond annealing (MSA) has been developed over the last several years as a viable approach to achieve the high electrical activation, limited diffusion and high abruptness needed for junctions in the sub-65nm regime. This paper will provide an overview of the technology including the motivation, technology and some process results. Both main approaches for MSA, sub-melt laser and flash lamp annealing will be discussed as well as the potential challenges to bring these technologies into mainstream manufacturing.

Abstract: This work presents a summary on the use of rapid thermal processing for implant annealing. It gives a short historical overview of rapid thermal processing systems and the first implant anneal processes on these newly developed tools. We then looked in detail on the soak anneal and spike anneal processes and the influence of certain process parameters. For the soak anneal influences of the ambient, either oxidizing or nitriding, were evaluated. The results of spike anneal processes are influenced by the pre-stabilization temperature, ramp-up and ramp-down rate, peak temperature, and gaseous ambient. The need for shallow, abrupt and highly activated junctions leads to co-implantation of species like fluorine or carbon in conjunction with pre-amorphization. Nowadays, combinations of spike and millisecond annealing as well as millisecond annealing alone are in the focus.