For Libraries For Publication Open Access Downloads About Us Contact Us
Paper Titles
Design and Implementation of a System on FPGA for Fault Detection on Industrial Machines through Vibration Sensing
p.5351
Development and Implementation of an Integrated Sensor Platform Based on Graphical Monitoring and Control
p.5358
Semi Active Control of Chaos in Systems Excited by Non-Ideal DC Motor
p.5367
Characterization of Capacitively Coupled Radio-Frequency Argon Plasma by Electrical Circuit Simulation
p.5373
Novel Materials as Interlayer Low-K Dielectrics for CMOS Interconnect Applications
p.5380
PLC Based POKE-YOKE System for Output Shaft Assembly
p.5384
Walking Assist Device: The Electronic and Firmware Design
p.5390
An Architecture Analysis of ADCS for CubeSat: A Recipe for ADCS Design of ICUBE
p.5397
A Study on Nanocutting of Monocrystalline Silicon by Molecular Dynamics Simulation
p.5405

Novel Materials as Interlayer Low-K Dielectrics for CMOS Interconnect Applications

Article Preview

Abstract:

Scaling down the integrated circuits has resulted in the arousal of number of problems like interaction between interconnect, crosstalk, time delay etc. These problems can be overcome by new designs and by use of corresponding novel materials, which may be a solution to these problems. In the present paper we try to put forward very recent development in the use of novel materials as interlayer dielectrics (ILDs) having low dielectric constant (k) for CMOS interconnects. The materials presented here are porous and hybrid organo-inorganic new generation interlayer dielectric materials possessing low dielectric constant and better processing properties.

You might also be interested in these eBooks
Mechanical and Aerospace Engineering, ICMAE2011 View Preview

Info:

Periodical:

Applied Mechanics and Materials (Volumes 110-116)

Pages:

5380-5383

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.110-116.5380

Citation:

Cite this paper

Online since:

October 2011

Authors:

Tejas R. Naik, Veena R. Naik, Nisha P. Sarwade

Keywords:

Hybrid Material, Interconnect, Interlayer Dielectric (ILD), Low-k Dielectric, Porous Material

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

© 2012 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

References

[1] Prager L, Marsik P, Wennrich L, Baklanov MR, Naumov S, Pistol L, et al, Microelectron Eng 85 : 2094-2097 (2008).

DOI: 10.1016/j.mee.2008.04.039

Google Scholar

[2] Zenasni A, Jousseaume V, Gourhant O, Favennec L and Maury P, Microelectron Eng 85: 2102-2104 (2008).

DOI: 10.1016/j.mee.2008.04.044

Google Scholar

[3] Heo J, Eom D and Kim HJ, Microelectron Eng 84: 2188-2191 (2007).

Google Scholar

[4] Kemeling N, Matushita K, Tsuji N, Kagami K, Kato M, Kaneko S, et al, Microelectron Eng 84: 2575-2581 (2007).

Google Scholar

[5] Chapelon LL, Vitiello J, Gonchond JP, Barbier D and Torres J, Microelectron Eng 83: 2136-2141 (2006).

Google Scholar

[6] Verdonck P, Roest DD, Kaneko S, Caluwaerts R, Tsuji N, Matushita K, et al, Surf Coat Technol 201: 9264-9268 (2007).

Google Scholar

[7] Lee YJ, Huang JM, Kuo SW and Chang FC, Polymer 46: 10056-10065 (2005).

Google Scholar

[8] Kohmura K, Tanaka H, Oike S, Murakami M, Fujii N, Takada S, et al, Thin Solid Films 515: 5019-5024 (2007).

DOI: 10.1016/j.tsf.2006.10.054

Google Scholar

[9] Huang XY, Jiang PK, Kim C, Liu F and Yin Y, Eur Polymer J 49: 377-386 (2009).

Google Scholar

[10] Bae IS, Cho SJ, Choi WS, Hong BY, Kim YJ, Kim YM, et al Thin Solid Films 516: 3577-3581 (2008).

Google Scholar

[11] Cho SJ, Bae IS, Jeong HD and Boo JH, Appl Surf Sci 254: 7817-7820 (2008).

Google Scholar

© 2025 Trans Tech Publications Ltd. All rights are reserved, including those for text and data mining, AI training, and similar technologies. For open access content, terms of the Creative Commons licensing CC-BY are applied.
Scientific.Net is a registered trademark of Trans Tech Publications Ltd.