A Hardware Accelerate Simulator for Network Processor Based on FPGA

Zhi Xiong Di; Kang Li; Jie Pang; Jiang Yi Shi; Pei Jun Ma; Yue Hao

doi:10.4028/www.scientific.net/AMM.130-134.3006

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 130-134A Hardware Accelerate Simulator for Network...

A Hardware Accelerate Simulator for Network Processor Based on FPGA

Abstract:

With the dramatically increase of the scale of the Network Processor, traditionally verification method can't satisfied the requirement of market due to the limitation of the simulate speed. For solving the verification problems, a novel hardware accelerate simulator for Network Processor based on FPGA is proposed. This simulator improves the simulate speed remarkably. Furthermore, the probed signals of the Network Processor can be dumped into wave file real-timely.

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Periodical:

Applied Mechanics and Materials (Volumes 130-134)

Pages:

3006-3009

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.130-134.3006

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Online since:

October 2011

Authors:

Zhi Xiong Di, Kang Li, Jie Pang, Jiang Yi Shi, Pei Jun Ma, Yue Hao

Keywords:

Hardware Accelerate, Network Processor, Verification

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References

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