A Novel Data-Oriented Methodology for Designing Complex SOC System with Bluespec SystemVerilog

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Abstract:

The continuously growing of semiconductor technology makes the novel SOC system complicated and hard to design. Conventional timing-control methodology focuses on the synchronizing the registers in a digital system. However, the central control of huge amount of synchronous signals and states is difficult to maintain and design, the debugging and verification period is extended accordingly. This paper proposed a novel deign methodology, called data-oriented methodology, to overcome the above challenges, by using Bluespec SystemVerilog and the corresponding tools. The simple handshaking mechanism and blocking mechanism are adopted to make sure the correctness of adjacent blocks, the complex centralized control unit can be reduced accordingly. Two examples, FDCT/IDCT and pipelined MIPS CPU, are provided to demonstrate two types of typical digital designs.

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2428-2432

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January 2013

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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