Applied Mechanics and Materials Vols. 284-287

Abstract: This analytic investigation intends to study the nano-tunnel problem of the single electron transistor (SET), which is the most important component in the nano-electronics industry. With a combined effort of quantum mechanics and similarity parameter, the PDE equation of transient position-probability density is attained and can be applied to predict the electron’s position inside the nano tunnel. Also, appropriate initial and the boundary conditions are set up in accordance to the actual electron behavior for solving this PDE of probability density function. Thereafter, a simple, closed-form solution for the probability density is obtained and expressed in terms of the error function for a new similarity variable η. In conclusions, this is an innovative approach by using the Schrödinger equation directly to solve the nano-tunnel problem. Moreover, with the aids of this analytic position-probability-density solution, it is illustrated that the free single electron in the SET’s tunnel can only appear at some specified regions, which are defined by a dimensionless parameter η within a range of 0≤η≤2. This result can be served as a valuable design reference for setting the practical manufacture requirement.

Abstract: Dynamic voltage and frequency scaling (DVFS) is an effective technique for reducing power consumption. The system performance is not easy to evaluate through Dynamic Voltage and Frequency Scaling. Most of studies use the execution time as an indicator while measuring the performance. However, DVFS adjusted processor speed during a fixed-length period so it cannot rely on the execution time to evaluate the system performance. This study proposes a novel and simple performance evaluation method to evaluate the system performance when DVFS is activated. Based on the performance evaluation method, this study also proposes a DVFS algorithm (P-DVFS) for a general-purpose operating system. The algorithm has been implemented on the Linux operating system and used a PXA270 development board. The results show that P-DVFS could accurately predict the suitable frequency, given runtime statistics information of a running program. In this way, the user can easily control the energy consumption by specifying allowable performance loss factor.

Abstract: This paper presents a 1-bit full adder by using as few as six transistors per bit in its design. It is designed with a combination of multiplexing control input and Boolean identities. The proposed design features lower operating voltage, higher computing speed and lower energy consumption due to the efficient operation of 6-transistor adder cell. The design adopts Multiplexing with Control input technique to alleviate the threshold voltage loss problem commonly encountered in pass transistor logic design. The proposed design successfully embeds the buffering circuit in the full adder design and the transistor count is minimized. The improved buffering helps the design operate under lower supply voltage compared with existing works. It also enhances the speed performance of the cascaded operation significantly while maintaining the performance edge in energy consumption. For performance comparison, the proposed full adder is evaluated along with four existing full adders via extensive BSIM4 simulation. The simulation results, 180nm process models, indicate that the proposed design has lowest energy consumption per addition along with the performance edge in both speed and energy consumption makes it suitable for low power and high speed embedded processor applications.

Abstract: In this paper we exploit a basic type of three-stage Distributed Bragg Reflector (DBR) laser that by adjusting its input driving currents in the tri-electrode to generate signals with wavelengths that are in the International Telecommunication Union (ITU)-Band. Many driving current combinations can generate the same ITU wavelength; we will consider in this paper the situation when the input currents are restricted within certain range and to find for all those input current combinations that generate output signals with wavelengths locating in the ITU defined wavelength range. And we will through simulations to determine which set of current combinations will generate the shortest switching time. We will also propose a new current control method, when we know in advance the signal will be switched to certain band, to determine the best current switching combinations that resulting in faster and shorter switching time than that of the conventional system structure which has the drawback that it has only one fixed current combinations for each channel.

Abstract: Removed due to high similarity index to the previously published paper: Terrel, Matthew, Michel JF Digonnet, and Shanhui Fan. "Ring-coupled Mach-Zehnder interferometer optimized for sensing." Applied optics 48.26 (2009): 4874-4879.

Abstract: Based on the digital time delay estimation (TDE) and Gauss-Newton Interpolation algorithms, the circular error probability (CEP) of the proposed four-station position system using time difference of arrival (TDOA) over Rayleigh fading channel was studied by numerical computation in three-dimension space. The hybrid three-station TDOA and direction of arrival (DOA) position system was used to improve the reliability of four-station TDOA position system. Simulations indicate that the accuracy of the proposed position system is significantly decreased by reducing one measuring station and providing one direction of arrival (DOA) measurement.

Abstract: Recently, a sub-Nyquist sampling system, called as Modulated Wideband Converter (MWC), for sparse analog signals is proposed in [1]. In this paper, the gain mismatch, i.e. the gain variation of the mixers, the low pass filters and the low-date rate ADCs, in the MWC is, firstly, analyzed. A gain error matrix defined to model the gain mismatch is, then, proposed to formulate all of these non-idealities of the gains. Based on the gain error matrix, a more accurate signal reconstruction algorithm is presented. Numerical simulation results show that the proposed signal reconstruction algorithm outperforms the reference algorithm in the presence of gain mismatch, while the analytical results are verified.

Abstract: In this paper, behavioral modeling approach and predistortion design methods are proposed for wireless transmitters with multi-branch radio frequency (RF) power amplifiers (PAs). Multi -branch RF PA architectures are studied such as balanced RF PA systems and linear amplification with nonlinear component (LINC) systems. Conventional behavioral modeling using single input and single output data cannot extract the behaviors of RF PAs in each branch. The behavioral modeling method using separated input signals and weighted input identification is proposed to extract accurate behavioral models for each branch. A decentralized predistortion structure that consists of multi-branch memory polynomial architecture predistortion components is proposed. The proposed behavioral modeling method is used for the design of decentralized predistortion using indirect learning method. The performances of proposed modeling and predistortion method are evaluated by comparing the normalized mean square error (NMSE) values with conventional single-branch behavioral modeling and predistortion. The input signal is 10MHz long-term evolution (LTE) signal. The results show that the proposed behavioral modeling and decentralized predistortion architecture are suitable for wireless transmitters with multi-branch RF PAs.

Abstract: In this paper, it tries from experimental measurements to derive the required minimum antenna isolation and from using this minimum antenna isolation to have the MIMO to execute at its utmost efficiency. The issue of the minimum antenna isolation is actually the problem of pursuing the possible antenna module area of a multi-antenna system. As smaller size communication system is explored in real life the request of small size communication system has been discussed and many systems have been developed. To verify the feasibility of designing a multi-antenna and high throughput system is through the adopt of many MIMO technique implemented IEEE 802.11n 2x2 products to verify whether its throughput can be doubled. In this paper we integrate 4 2x2 AP antenna sets and under the operation of 8 antennas to attain the 1200 Mbps PHY rate through proper selection and design of available antennas, for 1200 Mbps PHY rate it is equivalently to have more then 600 Mbps throughput and with this implementation it is enable to prove the feasibility of the designed system.

Abstract: In many applications such as digital communication systems, a reconfigurable clock is required to switch the desired frequency at necessary time. However, using the conventional direct digital frequency synthesizer (DDS) as a pulse or clock generator may cause jitter problems, therefore phase-interpolation approaches are used to generate a pulse or clock with correct time intervals. Focusing on design methodology, a high-precision DDS-like clock generator without phase accumulator and phase interpolation is proposed in this paper, which only uses the bidirectional integration on a single capacitor to directly achieve the clock output with correct time intervals. It also can avoid the impact on frequency error caused by the capacitance error. Therefore, the proposed DDS-like clock generator using bidirectional integration can provides a low-jitter and high-precision clock output, and it also has less hardware complexity.