Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

Abstract:

The dead-time effect of the SVPWM inverter was analyzed as well as its effect on the control system performance (distortion of phase voltage and zero-current clamp phenomenon of phase current, etc).Then, basing on the analysis about the generation of the dead-time effect, the error voltage vector compensation strategy was raised. In order to verify the correctness and reasonableness of the compensation strategy, simulation system was constructed in use of Matlab/Simulink software to implement analysis and research. Simulation results show that the zero-current clamp phenomenon of phase current was basically eliminated after using the dead-time compensation. Then spectrum analysis was made for the phase current waveform, which showed that the compensation strategy weakened the fifth and seventh harmonic waveform brought by the dead for the inverter, significantly improved sinusoidal and system control performance of the phase current, and proved the theoretical correctness and experimental feasibility.

• Periodical: Applied Mechanics and Materials (Volumes 300-301)
• Pages: 1200-1204
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.300-301.1200
• Online since: February 2013
• Authors: Shao Chang Chen, Hui Ying He, Chao Li, Chuan Hui Wang
• Keywords: Dead-Time Compensation, Error Voltage, Spectral Analysis, SVPWM, Vector Control (VC)

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