A Mapping Simulation of Code Generation for Partitioned System

Ya Qin Chen; Dian Fu Ma; Ying Wang; Xian Qi Zhao

doi:10.4028/www.scientific.net/AMM.325-326.1759

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 325-326A Mapping Simulation of Code Generation for...

A Mapping Simulation of Code Generation for Partitioned System

Abstract:

It is crucial for real-time embedded system to design and verify for a little fault may lead to a catastrophe. Architecture Analysis and Design Language (AADL) is a modeling language used to design and analysis the architecture of real-time embedded system based on Model Driven Architecture (MDA). Code generation of AADL model to codes running on the Real-time Operation System can avoid hand-writing mistakes and improve the efficiency of development. Partitioning is introduced into embedded system to control fault transmission. This paper presents a mapping approach to generate codes from AADL model for partitioned system, and the generated codes which include configuration codes and C codes will run on a partitioned platform.

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Periodical:

Applied Mechanics and Materials (Volumes 325-326)

Pages:

1759-1765

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.325-326.1759

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Online since:

June 2013

Authors:

Ya Qin Chen, Dian Fu Ma, Ying Wang, Xian Qi Zhao

Keywords:

AADL, ARINC653, Code Generation, Partitioned System

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References

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