PPSim: A Cycle-Accurate Simulator for PowerPC Instruction Set

Abstract:

Simulators play an important part in computer architecture research. As for specific microarchitecture study, which focuses on the accurate behavior of out-of-order scheduling, ALU contention, and function unit management, an over-simplified abstraction is not sufficient to represent modern processor organizations. Thus cycle-accurate simulators are introduced to describe the accurate behavior in target microarchitecture. In cycle-accurate simulators, the timing feature within function units is simulated. This paper presents PPSim, a cycle-accurate PowerPC instruction set simulator, which models the cache, branch prediction, and out of order pipeline in PowerPC microarchitecture.

• Periodical: Applied Mechanics and Materials (Volumes 325-326)
• Pages: 1766-1769
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.325-326.1766
• Online since: June 2013
• Authors: Xiao Peng Gao, Ping Yang Guo
• Keywords: Cycle-Accurate Simulation, Functional Simulation, Microarchitecture, POWERPC, Simulation

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