A Novel 4-bit 10Gsps ADC in 180nm SiGe Bicmos Process

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Abstract:

In this paper, a novel 4-bit ADC is presented. The ADC adopts interpolated flash architecture with eight preamplifiers followed by fifteen latches. The ECL technique is used in the design of the ADC. Because of the novel design techniques adopted in the ADC, the conversion rate is very fast, up to 10Gsps, which has been proved by the stimulation results.

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1500-1503

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July 2013

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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[1] J. Lee et al., A 5-b 10-Gsamples/s A/D converter for 10-Gb/s Optical Receivers, IEEE JSSC, vol. 39, no. 10, pp.1671-1679, October (2004).

Google Scholar

[2] P. Schvan, J. Bach, C. Falt, P. Flemke, R. Gibbins, Y. Greshishchev, N. Ben-Hamida, D. Pollex, J. Sitch, S. Wang J. Wolczanski, A 24 GS/s 6b ADC in 90 nm CMOS, ISSCC 2008, February 6.

DOI: 10.1109/isscc.2008.4523298

Google Scholar

[3] M. Grözing, M. Berroth, High-Speed ADC Building Blocks in 90 nm CMOS, SODC 2006, September 2-8.

Google Scholar

[4] C. Vogel, The Impact of Combined Channel Mismatch Effects in Time-Interleaved ADCs, IEEE TIM, vol. 54, no. 1, pp.415-427, Feb. (2005).

DOI: 10.1109/tim.2004.834046

Google Scholar

[5] Timmy Sundström and Atila Alvandpour, A 2. 5GS/s 30-mW 4 bit flash ADC in 90 nm CMOS, in NORCHIP, IEEE Custom Integrated Circuits Conf., Nov. 200.

DOI: 10.1109/norchp.2008.4738324

Google Scholar

[6] Lianhong Wu, Fengyi Huang, Yang Gao, Yan Wang , Jia Cheng, A 42 mW 2GS/s 4b flash ADC in 0. 18μm CMOS, Wireless Communications & Signal Processing, 2009. WCSP2009. International Conference, Nov (2009).

DOI: 10.1109/wcsp.2009.5371596

Google Scholar

[7] S. Sheikhaei, S. Mirabbasi, A. Lvanovo, A 43mW Single-Channel 4GS/s 4-Bit Flash ADC in 0. 18μm CMOS, in Proc. IEEE Custom Integrated Circuits Conf. Dec. 2007, p.333-336Conference, Nov (2009).

DOI: 10.1109/cicc.2007.4405746

Google Scholar

[8] Ferenci, D., Mauch, S., Grozing, M., Lang, F., Berroth, M., A 3bit 36GS/s flash ADC in 65nm low power CMOS technology, Integrated Circuits (ISIC), 2011 13th International Symposium on, On page(s): 344 - 347.

DOI: 10.1109/isicir.2011.6131967

Google Scholar