Design of a 0.7~3.8GHz Wideband Power Amplifier in 0.18-μm CMOS Process

Zhi Yuan Li; Xiang Ning Fan

doi:10.4028/www.scientific.net/AMM.364.429

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vol. 364Design of a 0.7~3.8GHz Wideband Power Amplifier in...

Design of a 0.7~3.8GHz Wideband Power Amplifier in 0.18-μm CMOS Process

Abstract:

The design of a 0.7~3.8GHz CMOS power amplifier (PA) for multi-band applications in TSMC 0.18-μm CMOS technology is presented. The PA proposed in this paper uses lossy matching network and low Q multistage impedance matching network to improve wideband. To achieve maximum linearity, this PA operates in the Class-A regime. The post-layout simulation results show that the power amplifier achieves 21.9dB of power gain, 22.3dBm of 1dB compression power output at 2GHz. The power adder efficiency (PAE) at gain compression point is 17.8% at 2GHz.

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Periodical:

Applied Mechanics and Materials (Volume 364)

Pages:

429-433

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.364.429

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Online since:

August 2013

Authors:

Zhi Yuan Li, Xiang Ning Fan

Keywords:

Broadband Power Amplifier, CMOS, Lossy Matching Network, Low Q Multistage Impedance Matching Network

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