Design and Simulation of Testing Circuit for Radio Frequency Chip

Qing Luo; Hui Chen; Guo Yuan Li

doi:10.4028/www.scientific.net/AMM.423-426.2639

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 423-426Design and Simulation of Testing Circuit for Radio...

Design and Simulation of Testing Circuit for Radio Frequency Chip

Abstract:

RF technology is widely used in wireless communication. Due to the small size, high density and high frequency, RF IC testing based on ATE faces many challenges. This paper took a LNA chip fabricated by a GaAs process as an example, simulated the test circuit and studied two methods of RF impedance matching by using the software of Agilent ADS. The results show that it solves the impedance mismatch of the input and output ports in RF test, providing the theoretical support to the design and production of RF test board.

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Periodical:

Applied Mechanics and Materials (Volumes 423-426)

Pages:

2639-2644

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.423-426.2639

Citation:

Cite this paper

Online since:

September 2013

Authors:

Qing Luo, Hui Chen, Guo Yuan Li

Keywords:

Automatic Test Equipment (ATE), Impedance Matching, Integrated Circuit (IC) Testing, Radio Frequency (RF)

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