The Design and Implementation of the MD5 Algorithm Based on FPGA

Lei Wang; Yan Yan Yu; Qian Huang; Jun Yang; Zheng Peng Zhao

doi:10.4028/www.scientific.net/AMM.427-429.806

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 427-429The Design and Implementation of the MD5 Algorithm...

The Design and Implementation of the MD5 Algorithm Based on FPGA

Abstract:

This paper introduces the principle of digital signature algorithm MD5, focused on the calculation phase of the algorithm, the algorithm structure iteration of the loop, and to optimize its calculation phase, and given FPGA design icon, the experiment can be drawn based on FPGA with less resource, fast implementation of the MD5 algorithm. The hardware implementation of the MD5 hash algorithm HMACs build encryption accelerator which has some practical value.

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Periodical:

Applied Mechanics and Materials (Volumes 427-429)

Pages:

806-809

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.427-429.806

Citation:

Cite this paper

Online since:

September 2013

Authors:

Lei Wang*, Yan Yan Yu, Qian Huang, Jun Yang, Zheng Peng Zhao

Keywords:

FPGA, Hash, Iterative Looping Architecture, MD5 Algorithm

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* - Corresponding Author

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