A Reconfigurable Radix-r FFT Hardware Structure Design

Yu Xuan Zhang; He Ping Zhao; Ji Yang Yu

doi:10.4028/www.scientific.net/AMM.644-650.3568

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 644-650A Reconfigurable Radix-r FFT Hardware Structure...

A Reconfigurable Radix-r FFT Hardware Structure Design

Abstract:

A reconfigurable radix-r FFT structure design is proposed, to reduce the memory and time consumption caused by zero-paddling in traditional radix-2/4 methods. The radix-r FFT computing flow is divided into three iterative steps: rotate factors computation; memory access schedule; butterfly coefficients matrix multiplication. The hardware structure is depicted, in which the memory accessing schedule is implemented by a finite state machine, the rotate factors and butterfly coefficients are calculated by the Taylor series expansion. The time consumption of the proposed structure is analyzed, and with the arbitrary data points, an optimized radix can be used to minimize the computing time. Compared with traditional methods, the proposed design has the advantage of generality, less time consumption and hardware costs.

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Periodical:

Applied Mechanics and Materials (Volumes 644-650)

Pages:

3568-3574

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.644-650.3568

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Online since:

September 2014

Authors:

Yu Xuan Zhang*, He Ping Zhao, Ji Yang Yu

Keywords:

FFT, Radix-R, Reconfigurable

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* - Corresponding Author

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