Image Acquisition System Design of Camera Based on FPGA

Jun Chao Zhu; Yong Chen Li; Ying Kui Jiao; Zhi Jun Ma

doi:10.4028/www.scientific.net/AMM.668-669.836

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 668-669Image Acquisition System Design of Camera Based on...

Image Acquisition System Design of Camera Based on FPGA

Abstract:

It designs an image acquisition system of the camera based on FPGA. It uses a CMOS image sensor as the sensitive chip and controls the timing of image collection by designing the FPGA. FPGA transfers captured image into a PC to display. It uses the I2C bus to initiate CMOS sensor. A problem of cross-clock is solved by asynchronous FIFO. By the ping-pong operation based on two SDRAM chips to solve the problem of high speed data cache. The FPGA chip communicates signal data with PC by Ethernet port. The experiment proved that the system is able to collect 2048×1536 resolution images in a speed of 12fps.

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Periodical:

Applied Mechanics and Materials (Volumes 668-669)

Pages:

836-839

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.668-669.836

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Online since:

October 2014

Authors:

Jun Chao Zhu, Yong Chen Li, Ying Kui Jiao, Zhi Jun Ma

Keywords:

CMOS Image Sensor, FPGA, Image Acquisition

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