Design of a 10 Bit 2GHz Digital to Analog Converter Circuit

Yu Jun Yang; Wei  Hu; Jun  Liu; Zhou Yu; Dong Bing Fu; Guang Bing Chen

doi:10.4028/www.scientific.net/AMM.713-715.942

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 713-715Design of a 10 Bit 2GHz Digital to Analog...

Design of a 10 Bit 2GHz Digital to Analog Converter Circuit

Abstract:

This paper presents the design of a 10 bit 2GHz digital to analog converter circuit. The digital to analog converter circuit adopts the design simulation of HBT process, able to work at a sampling frequency of 2 GHz, the highest sampling frequency can reach about 4 GHz. The SFDR of the digital to analog converter circuit can reach 62dB (simulation work at 2 GHz), the SFDR can reach 45 dB (simulation work at 4 GHz). Early product parameters of the digital to analog converter circuit (working in 1 GHz sampling frequency) are as follows: the narrowband SFDR parameter can be achieved 81 dB, broadband SFDR parameters can reach 46 dB.

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Periodical:

Applied Mechanics and Materials (Volumes 713-715)

Pages:

942-945

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.713-715.942

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Online since:

January 2015

Authors:

Yu Jun Yang*, Wei Hu, Jun Liu, Zhou Yu, Dong Bing Fu, Guang Bing Chen

Keywords:

Digital to Analog Converter, Heterojunction Bipolar Transistor, Spurious-Noise-Free Dynamic Range

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* - Corresponding Author

References

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