Modeling and Simulation of Tunneling Current Density for Ultra Thin MOS Devices

Niladri Pratap Maity; Reshmi Maity; R.K. Thapa; S. Baishya

doi:10.4028/www.scientific.net/AMM.860.30

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vol. 860Modeling and Simulation of Tunneling Current...

Modeling and Simulation of Tunneling Current Density for Ultra Thin MOS Devices

Abstract:

In this paper, an analytical model for evaluation of tunneling current density of ultra-thin Metal Oxide Semiconductor (MOS) devices is presented. Results have been obtained for a wide variation of oxide thickness and biasing condition having doping concentration of 1 x 10¹⁷cm^-3. The investigation for the tunneling current density is limited to low temperatures, so that any thermal involvement to current flow can be neglected. The self-consistent oxide tunneling model has been used for device simulation, which is simple to implement and assist in the study of deep sub-micron MOS gate current effects, therefore correctly calculate the terminal current. Tunnel resistivity is also evaluated utilizing this tunneling current density model. Theoretical predictions are compared with the results obtained by the 2-D numerical device simulator ATLAS, good agreements between the two are observed.

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Periodical:

Applied Mechanics and Materials (Volume 860)

Pages:

30-34

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.860.30

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Online since:

December 2016

Authors:

Niladri Pratap Maity*, Reshmi Maity, R.K. Thapa, S. Baishya

Keywords:

ATLAS, MOS, Tunneling Current

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* - Corresponding Author

References

[1] H. Wu, Y. Zhao, M. H. White, Quantum mechanical modeling of MOSFET gate leakage for high-k gate dielectrics, Solid-State Electronics 50 (2006) 1164–1169.

DOI: 10.1016/j.sse.2006.04.036

Google Scholar

[2] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Effect of Image Force on Tunneling Current for Ultra Thin Oxide Layer Based Metal Oxide Semiconductor Devices, Nanoscience and Nanotechnology Letters 7 (2015) 331-333.

DOI: 10.1166/nnl.2015.1970

Google Scholar

[3] F. Li, S. Mudanai, Y Fan, L. Franklin, S. Banerjee, Physically based Quantum Mechanical Compact Model of MOS Devices Substrate-Injected Tunneling Current Through Ultra Thin (EOT ~ 1 nm) SiO2 and High-K Gate Stacks, IEEE Trans. on Electron Devices 53 (2006).

DOI: 10.1109/ted.2006.871877

Google Scholar

[4] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Image Force Effect on Tunneling Current for Ultra Thin High-K Dielectric Material Al2O3 Based MOS Devices, Journal of Nanoelectronics and Optoelectronics 10 (2015) 645-648.

DOI: 10.1166/jno.2015.1812

Google Scholar

[5] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Study of Interface Charge Densities for ZrO2 and HfO2 based Metal-Oxide-Semiconductor Devices, Advances in Material Science and Engineering 2014 (2014) Article ID 497274 1-6.

DOI: 10.1155/2014/497274

Google Scholar

[6] N. P. Maity, R. R. Thakur, R. Maity, R. K. Thapa, S. Baishya, Analysis of Interface Charge Using Capacitance-Voltage Method for Ultra Thin HfO2 Gate Dielectric based MOS Devices, Procedia Computer Science, 5 (2015) 757-760.

DOI: 10.1016/j.procs.2015.07.470

Google Scholar

[7] N. P. Maity, R. R. Thakur, R. Maity, R. K. Thapa, S. Baishya, Interface Charge Density Measurement for Ultra Thin ZrO2 Material based MOS Devices Using Conductance Method, Procedia Computer Science, 5 (2015) 761-765.

DOI: 10.1016/j.procs.2015.07.472

Google Scholar

[8] N. P. Maity, R. K. Thapa, S. Baishya, Comparison of Different High-k Dielectric Materials in MOS Device from C-V Characteristics, Advanced Materials Research 816 (2013) 60-64.

DOI: 10.4028/www.scientific.net/amr.816-817.60

Google Scholar

[9] N. P. Maity, S. Chakraborty, M. Roy, Silicon and Silicon Carbide Based Metal-Oxide-Semiconductor Devices Using HfO2 and SiO2 Gate Dielectric, International Journal of Applied Engineering Research 6 (2011) 391-399.

Google Scholar

[10] N. P. Maity, A. Kumar, R. Maity, S. Baishya, Analysis of Flatband Voltage of MOS Devices Using High-k Dielectric Materials, Procedia Material Science 5 (2014) 1198-1204.

DOI: 10.1016/j.mspro.2014.07.421

Google Scholar

[11] N. P. Maity, A. Pandey, S. Chakraborty, M. Roy, High-k HfO2 based Metal-Oxide-Semiconductor Devices Using Silicon and Silicon Carbide Semiconductor, J. Nano - Electron. Phys. 3 (2011) 947-955.

Google Scholar

[12] J. G. Simmons, Generalized Formula for the Electric Tunnel effect Between Similar Electrodes Separated by a Thin Insulating Film, Journal of Applied Physics, 34 (1963) 1793-1803.

DOI: 10.1063/1.1702682

Google Scholar