Analysis of Interface Trap Densities for Al₂O₃ Dielectric Material Based Ultra Thin MOS Devices

Abstract:

In this paper the interface trap densities (D_it) are analyzed for ultra thin dielectric material based metal oxide semiconductor (MOS) devices using high-k dielectric material Al₂O_3. The D_it have been calculated by a novel approach using conductance method and it indicates that by reducing the thickness of the oxide, the D_it increases and similar increase is also found by replacing SiO₂ with Al₂O₃. For the same oxide thickness SiO₂ has the lowest D_it and found to be the order of 10¹¹ cm^-2eV^-1. The D_it is found to be in good agreement with published fabrication results at p-type doping level of 1 × 10¹⁷ cm^-3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

• Periodical: Applied Mechanics and Materials (Volume 860)
• Pages: 25-29
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.860.25
• Online since: December 2016
• Authors: Niladri Pratap Maity*, Rajiv R. Thakur, Reshmi Maity, R.K. Thapa, S. Baishya
• Keywords: ATLAS, High-k, Interface Charges, MOS

References

[1] M. Wu, Y. Wu, C. Chao, C. Lin, C. Wu, Crystalline ZrTiO4-Gated Ge Metal-Oxide-Semiconductor devices with amorphous Yb2O3 as a passivation Layer, IEEE Trans. on Nanotech. 12 (2013) 1018-1021.

DOI: 10.1109/tnano.2013.2283252

[2] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Study of Interface Charge Densities for ZrO2 and HfO2 based Metal-Oxide-Semiconductor Devices, Advances in Material Science and Engineering 2014 (2014) Article ID 497274 1-6.

DOI: 10.1155/2014/497274

[3] N. P. Maity, R. R. Thakur, R. Maity, R. K. Thapa, S. Baishya, Analysis of Interface Charge Using Capacitance-Voltage Method for Ultra Thin HfO2 Gate Dielectric based MOS Devices, Procedia Computer Science, 5 (2015) 757-760.

DOI: 10.1016/j.procs.2015.07.470

[4] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Effect of Image Force on Tunneling Current for Ultra Thin Oxide Layer Based Metal Oxide Semiconductor Devices, Nanoscience and Nanotechnology Letters 7 (2015) 331-333.

DOI: 10.1166/nnl.2015.1970

[5] D. Hoogeland, K. B. Jinesh, F. Roozeboom, W. Besling, M. Van, W. Kessels, Plasma-assisted atomic layer deposition of TiN/Al2O3 stacks for metal-oxide-semiconductor capacitor applications, Journal of Applied Physics 106 (2009) 114107 1-7.

DOI: 10.1063/1.3267299

[6] N. P. Maity, R. Maity, R. K. Thapa, S. Baishya, Image Force Effect on Tunneling Current for Ultra Thin High-K Dielectric Material Al2O3 Based MOS Devices, J. Nanoelectronics and Optoelectronics 10 (2015) 645-648.

DOI: 10.1166/jno.2015.1812

[7] D. Souza, J. Kiewra, Y. Sun, A. Callegari, D. Sadana, G. Shahidi, D. Webb, Inversion mode n-channel GaAs field effect transistor with high-k/metal gate, Applied Physics Letters 92 (2008) 153508 1-2.

DOI: 10.1063/1.2912027

[8] N. P. Maity, R. R. Thakur, R. Maity, R. K. Thapa, S. Baishya, Interface Charge Density Measurement for Ultra Thin ZrO2 Material based MOS Devices Using Conductance Method, Procedia Computer Science, 5 (2015) 761-765.

DOI: 10.1016/j.procs.2015.07.472

[9] G. Adamopoulos, S. Thomas, D. Bradley, M. McLachlan, T. Anthopoulos, Low-voltage ZnO thin-film transistors based on Y2O3 and Al2O3 high-k dielectrics deposited by spray pyrolysis in air, Appl. Physics Lett. 98 (2011) 123503.

DOI: 10.1063/1.3568893

[10] N. P. Maity, A. Pandey, S. Chakraborty, M. Roy, High-k HfO2 based Metal-Oxide-Semiconductor Devices Using Silicon and Silicon Carbide Semiconductor, J. Nano - Electron. Phys. 3 (2011) 947-955.

[11] N. P. Maity, S. Chakraborty, M. Roy, Silicon and Silicon Carbide Based Metal-Oxide-Semiconductor Devices Using HfO2 and SiO2 Gate Dielectric, International Journal of Applied Engineering Research 6 (2011) 391-399.

[12] N. P. Maity, R. K. Thapa, S. Baishya, Comparison of Different High-k Dielectric Materials in MOS Device from C-V Characteristics, Advanced materials Research 816 (2013) 60-64.

DOI: 10.4028/www.scientific.net/amr.816-817.60

[13] E. Nicollian, J. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, Wiley-Blackwell Publishers, USA, (2002).

[14] B. E. Deal, Standardized terrninulogy for oxide charge associated with thermally oxidized silicon, IEEE Transactions on Electron Devices 27 (1980) 606-608.

DOI: 10.1109/t-ed.1980.19908

[15] C. Lu, K. Liao, C-Y Lu, S-C Chang, T-K Wang, F-C Hou, Y-T Hsu, Tunneling component suppression in charge pumping measurement and reliability study for high-k gated MOSFETs, Microelectronics Reliability 51 (2011) 2110–2114.

DOI: 10.1016/j.microrel.2011.04.021

[16] R. Engel-Herbert, Y. Hwang, S. Stemmer, Comparison of methods to quantity Interface Trap Densities at dielectric/III-V Semiconductor Interfaces, J. of Appl. Physics 108 (2010) 1241011.

DOI: 10.1063/1.3520431