Reliability Enhancement in the 60 V Power pLDMOS by a Bulk-FOD Engineering

Shen Li Chen; Shawn Chang; Yu Ting Huang; Shun Bao Chang

doi:10.4028/www.scientific.net/AMR.1079-1080.506

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 1079-1080Reliability Enhancement in the 60 V Power pLDMOS...

Reliability Enhancement in the 60 V Power pLDMOS by a Bulk-FOD Engineering

Abstract:

This work is focused on the 0.25 μm 60 V high-voltage pLDMOS deviceswhich will be integrated with an FOD structure in the bulk region, and its ESD protection ability is improved by using this architecture. It is found that as an FOD element adding, the FOD area ratio is increased, I_t2 value will be enhanced too. However, as the FOD area ratio is increased, the V_t1 value of thecorresponding sample is not changed so much about a range of 1 ~ 2V; at thesame time the R_on value will be declined, which were due to a uniformconduction phenomenon. From the experimental data,it is revealed that the I_t2value improved 15.4%, and R_on valuedecreased about 8.6%.

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Periodical:

Advanced Materials Research (Volumes 1079-1080)

Pages:

506-509

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.1079-1080.506

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Online since:

December 2014

Authors:

Shen Li Chen*, Shawn Chang, Yu Ting Huang, Shun Bao Chang

Keywords:

Electrostatic Discharge (ESD), Field-Oxide Device (FOD), High Voltage (HV), Holding Voltage (V_h), Latch-Up (LU), On Resistance (R_on), P-Channel Lateral-Diffused MOS (pLDMOS), Secondary Breakdown Current (I_t2), Transmission-Line-Pulse (TLP), Trigger Voltage (V_t1)

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References

[1] M. -D. Ker and J. -H. Chen: IEEE Journal of Solid-State Circuits Vol. 41(11) (2006), 2601-2609.

Google Scholar

[2] S. -L. Chen and M. -H. Lee: IEEE International Symposium on Next-Generation Electronics (2013), 51-54.

Google Scholar

[3] Y. -C. Huang, C. -T. Dai, M. -D. Ker: (2013), 116-119.

Google Scholar

[4] F. Ma, B. Zhang, Y. Han, J. Zheng, B. Song, S. Dong, H. Liang: IEEE Electron Device Letters Vol. 34(9) (2013), 1178-1180.

Google Scholar

[5] S. Fujiwara, K. Nakaya, T. Hirano, T. Okuda, Y. Watanabe: IEEE 33rd Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) (2011), 1-6.

DOI: 10.23919/eos/esd.2018.8509785

Google Scholar

[6] S. -L. Chen, M. -H. Lee, Y. -S. Lai, C. -J. Lin: IEEE International Future Energy Electronics Conference (IFEEC-2013), 740-745.

Google Scholar