A New Configuration Scheme for Multi-FPGA Systems Based on XCF32P

Dan Gui Yan; Cheng Chang Zhang; Rui Jun Tong

doi:10.4028/www.scientific.net/AMR.204-210.1014

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 204-210A New Configuration Scheme for Multi-FPGA Systems...

A New Configuration Scheme for Multi-FPGA Systems Based on XCF32P

Abstract:

The paper gives a new configuration method for Multi-FPGA systems based on XCF32P. As an example, the method adopts slave SelectMAP model, uses a XCF32P and a CPLD XC9572 to configure four Virtex XCV200 FPGAs. The configuration hardware interface circuit and CPLD software control program are designed, due to adopt a single vendor solution program, the designs for software and hardware of systems are simplified, and it can receive a higher configuration rate.

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Periodical:

Advanced Materials Research (Volumes 204-210)

Pages:

1014-1017

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.204-210.1014

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Online since:

February 2011

Authors:

Dan Gui Yan, Cheng Chang Zhang, Rui Jun Tong

Keywords:

Configuration, Design Revisions, Field-Programmable Gate Array (FPGA), System, XCF32P

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References

[1] http: /www. dinigroup. com/index. php/product=DN9000k10.

Google Scholar

[2] Sen YANG, Jianjun CHEN, Jianguo WANG. System ACE CF Technology-A New Configuration Solution for FPGAs[J]. Radar & Ecm, 2002(4): 72-77.

Google Scholar

[3] Peng LI, julong LAN. The configuration method for FPGA based on CPLD and Flash[J]. Application of Electronic Technique, 2006(6): 101-103.

Google Scholar

[4] Tiantian GUO. Interface Circuit of Configuring Virtex FPGA Through SelectMAP[J]. Microprocessors, 2000(4): 17-19.

Google Scholar

[5] Honggang ZHANG, fange XIN, deshi WANG. The fast configuration circuit design for FPGA based on CPLD[J]. Application of Electronic Technique, 2006(2): 123-125.

Google Scholar

[6] Jinqiu XIAO, Chuanyang LIU, Yi FENG, Jialin ZHONG. Design of FPGA Initialization Configure System at High Speed with LPC Bus[J]. Computer Engineering, 2005(13): 176-178.

Google Scholar

[7] Platform Flash PROM User Guide. http: /www. xilinx. com, UG161(v1. 5) October 26, (2009).

Google Scholar