Hardware Implementation of a Real-Time Data Processing Algorithm in Marine Engineering Data Acquisition

Abstract:

According to the architecture characteristics of the mass data acquisition system in marine seismic exploration, this paper designed a real-time data processing algorithm which can convert the collected time-sequence data to channel-sequence data. A hardware implementation of the algorithm based on FPGA+DDR SDRAM is developed to complete the whole conversion process. Here, FPGA is used to achieve time sequence data receiving, analyzing, preliminary processing and the interface to DDR SDRAM. Two DDR SDRAM’s are used in ping-pang mode to store time-sequence data and to cooperate with FPGA in realizing time-to-channel sequence data conversion. Test results showed that, after applying the algorithm to the FCI in high-precision marine seismic data acquisition and recording system, this arithmetic could realize caching collected data without redundancy and converting data from time sequence to channel sequence without dead time, besides, this algorithm also greatly improved the efficiency and reliability of data processing.

• Periodical: Advanced Materials Research (Volumes 268-270)
• Pages: 110-115
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.268-270.110
• Online since: July 2011
• Authors: Ling Ma, Ke Zhu Song, Jun Feng Yang, Ping Cao
• Keywords: DDR SDRAM, Field-Programmable Gate Array (FPGA), Marine Engineering, Ping-Pang Mode, Time-to-Channel Sequence Data Converting

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