Effect of Substrates on the Characteristics of Silicon Carbide Deposited from Methyltrichlorosilane
SiC is fabricated by chemical vapor deposition (CVD) on graphite and Si3N4 ceramic respectively. The morphology, composition, grain size and electrical conductivity of SiC deposited on graphite (CVD-SiC(C)) and on Si3N4 ceramic (CVD-SiC(N)) are investigated and compared. The morphology of CVD-SiC(C) and CVD-SiC(N) is much different with each other. The grain size of CVD-SiC(C) is bigger than that of CVD-SiC(N). It is nearly stoichiometric in CVD-SiC(C), while carbon-rich in CVD-SiC(N), so the electrical conductivity and dielectric loss of CVD-SiC(N) are much higher than that of CVD-SiC(C). As the annealing temperature increases, the grain size and electrical conductivity of CVD-SiC(C) and CVD-SiC(N) both increase.
Pengcheng Wang, Liqun Ai, Yungang Li, Xiaoming Sang and Jinglong Bu
C. Y. Lu et al., "Effect of Substrates on the Characteristics of Silicon Carbide Deposited from Methyltrichlorosilane", Advanced Materials Research, Vols. 295-297, pp. 1422-1427, 2011