Design of Pythagorean Hodograph Curve Interpolator Based on NiosII Embedded Processor and FPGA

Abstract:

In this paper, a novel architecture of Pythagorean Hodograph (PH) curve interpolator based on Nios Ⅱ embedded processor and FPGA is proposed. The whole interpolator including NiosⅡ processor is built in a single FPGA chip. The interpolator uses a two-stage interpolation scheme to reduce the computational burden of PH curve interpolator. The Nios Ⅱ embedded processor implements 1st-stage interpolation, the FPGA receives the command from the Nios Ⅱ processor and implements 2nd-stage interpolation simultaneously. Therefore, the interpolator can implement the real-time PH curve interpolation algorithm steadily to meet the needs of high-speed and high-precision machining.

• Periodical: Advanced Materials Research (Volumes 383-390)
• Pages: 6868-6872
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.383-390.6868
• Online since: November 2011
• Authors: Jing Jie Guo, Wei Tang
• Keywords: Field-Programmable Gate Array (FPGA), Interpolator, Nios II Embedded Processor, Pythagorean Hodograph Curve

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