[1]
Jean-Pierre Colinge. Silicon-on-Insulator Technology: Materials to VLSI, 3rd Edition. Norwell, Massachusetts, USA: Kluwer Academic Publishers, (2004).
Google Scholar
[2]
D. Greenlaw, G. Burbach, T. Feudel, F. Feustel, K. Frohberg, et al. Taking SOI substrates and low-k dielectrics into high-volume microprocessor production, " IEDM , 03 Technical Digest, IEEE Press, Dec. 2003, p.11.
DOI: 10.1109/iedm.2003.1269278
Google Scholar
[3]
R. Bolam, G. Shahidi, F. Assaderaghi, M. Khare, A. Mocuta, et al. Reliability issues for silicon-on-insulator, " IEDM , 00 Technical Digest, IEEE Press, Dec. 2000, pp.131-134, doi: 10. 1109/IEDM. 2000. 904275.
DOI: 10.1109/iedm.2000.904275
Google Scholar
[4]
Eugene Zhao, John Zhang, Akram Salman, Niraj Subba, Jay Chan, et al. Reliability challenges of high performance PD SOI CMOS with ultra-thin gate dielectrics, 2003 International Semiconductor Device Research Symposium, IEEE Press, Dec. 2003, pp.357-358.
DOI: 10.1109/isdrs.2003.1272134
Google Scholar
[5]
M. Yoshimi, M. Terauchi, A. Nishiyama, O. Arisumi, A. Murakoshi, et al. Suppression of the floating-body effect in SOI MOSFET's by the bandgap engineering method using a Si1-x Gex source structure, IEEE Transactions on Electron Devices, Vol. 44, Mar. 1997 pp.423-430.
DOI: 10.1109/16.556152
Google Scholar
[6]
M. Horiuchi and M. Tamura. BESS: a source structure that fully suppresses the floating body effect in SOI CMOSFET's, IEEE Transactions on Electron Devices, Vol. 45, May 1998, pp.1077-1083, doi: 10. 1109/16. 669536.
DOI: 10.1109/16.669536
Google Scholar
[7]
A. Nishiyama, O. Arisumi, M. Yoshimi. Suppression of the floating body effect in partially-depleted SOI MOSFET's with SiGe source structure and its mechanisms, IEEE Transactions on Electron Devices, Vol. 44, Dec. 1997, pp.2187-2191.
DOI: 10.1109/16.644634
Google Scholar
[8]
D. Chang, S. Veeraraghavan, M. Mendicino, M. Rashed, D. Connelly, et al. Efficacy of Ar in reducing the kink effect on floating body NFD/SOI CMOS, 1998 IEEE International SOI Conference, Oct. 1998, pp.155-156, doi: 10. 1109/SOI. 1998. 723158.
DOI: 10.1109/soi.1998.723158
Google Scholar
[9]
Xiaowu Cai and Chaohe Hai. Study of body contact of partial depleted SOI NMOS devices, 2006 8th International Conference on Solid-State and Integrated Circuit Technology, IEEE Press, Oct. 2006, pp.212-214, doi: 10. 1109/ICSICT. 2006. 306164.
DOI: 10.1109/icsict.2006.306164
Google Scholar
[10]
J. Sleight and K. Mistry. A compact schottky body contact technology for SOI transistors, " IEDM , 97 Technical Digest, IEEE Press, Dec. 1997, pp.419-422, doi: 10. 1109/IEDM. 1997. 650414.
DOI: 10.1109/iedm.1997.650414
Google Scholar
[11]
J. Damiano and P. D. Franzon. Integrated dynamic body contact for H-gate PD-SOI MOSFETs for high performance/low power, 2004 IEEE International SOI Conference, Oct. 2004, pp.115-116.
DOI: 10.1109/soi.2004.1391580
Google Scholar
[12]
LI Rui-zhen and HAN Zheng-sheng. Novel BTS structure technology for partially depleted SOI MOSFET, Chinese Journal of Electron Device, Vol. 28, Dec. 2005, pp.730-732.
Google Scholar
[13]
ZHAO Hongchen, HAI chaohe, Han Zhengsheng and QIAN He. Radiation of SOI MOSFET with shallow source, Chinese Journal of Electron Device, Vol. 25, June 2004, pp.735-740.
Google Scholar
[14]
Y. Fukuda, T. Yamada, M. Sawada. ESD parameter extraction by TLP measurement, 2009 31st EOS/ESD Symposium, Aug. 2009, pp.1-6.
Google Scholar