Hardware-Software Co-Design for BLDC Motor Speed Controller Design

Article Preview

Abstract:

This paper proposes a combined hardware-software approach for a controller design. The case of a brushless DC (BLDC) motor speed controller is studied. A hardware controller is implemented inside a field programmable gate array (FPGA) device, together with soft core processors that implement by software non-critical tasks, like liquid crystal display (LCD) interface and serial data communication to a host computer. This way, the control algorithm is executed in hardware, as fast as possible, while the monitoring tasks are performed by the software. Experimental results are provided, showing the working design.

You might also be interested in these eBooks

Info:

Periodical:

Advanced Materials Research (Volumes 463-464)

Pages:

1256-1259

Citation:

Online since:

February 2012

Export:

Price:

Permissions CCC:

Permissions PLS:

Сopyright:

© 2012 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] C. Maxfield, FPGAs: World Class Designs, Newnes Elsevier (2009).

Google Scholar

[2] J. Nurmi, Processor Design: System-on-Chip Computing for ASICs and FPGAs, Springer (2007).

Google Scholar

[3] E. Monmasson, M. N. Cirstea, FPGA design methodology for industrial control systems - a review, IEEE Trans. Ind. Electron., vol. 54, no. 4 (2007).

DOI: 10.1109/tie.2007.898281

Google Scholar

[4] I. Bahri, E. Monmasson, F. Verdier, M. E. -A. Ben Khelifa, SoPC-based current controller for permanent magnet synchronous machines drive, Proc. IEEE Int. Symp. Ind. Electron. (2010).

DOI: 10.1109/isie.2010.5636553

Google Scholar

[5] G. Maragliano, M. Marchesoni, L. Vaccaro, FPGA implementation of a sensorless PMSM drive control algorithm based on algebraic method, Proc. IEEE Int. Symp. Ind. Electron. (2010).

DOI: 10.1109/isie.2010.5637857

Google Scholar

[6] P. Coussy, A. Morawiec (Editors), High-Level Synthesis: From Algorithm to Digital Circuit, Springer (2008).

DOI: 10.1007/978-1-4020-8588-8

Google Scholar

[7] B. Alecsa, A. Onea, An FPGA implementation of a brushless DC motor speed controller, Proc. IEEE 16th Int. Symp. Design Technol. Electron. Packag. (2010).

DOI: 10.1109/siitme.2010.5653617

Google Scholar

[8] S. Oniga, A. Tisan, C. Lung, I. Orha, A. Buchman, Adaptive hardware-software co-design platform for fast prototyping of embedded systems, Proc. 12th Int. Conf. Optim. Electrical Electron. Equip. (2010).

DOI: 10.1109/optim.2010.5510516

Google Scholar

[9] A. Sathyan, N. Milivojevic, Y. -J. Lee, M. Krishnamurthy, A. Emadi, An FPGA-based novel digital PWM control scheme for BLDC motor drives, IEEE Trans. Ind. Electron., vol. 56, no. 8 (2009).

DOI: 10.1109/tie.2009.2022067

Google Scholar

[10] B. Alecsa, A. Onea, Combined hardware-software approach for BLDC motor speed controller design, Proc. Int. Conf. Mech. Eng. Robot. Aerosp. (2010).

DOI: 10.4028/www.scientific.net/amr.463-464.1256

Google Scholar