An FPGA Based Frame Rate Enhancer for LCD Display in Embedded Systems

Kang Ping Xu; Ji Ye Huang; Hui Jiang Liang; Zhi Wei He; Ming Yu Gao

doi:10.4028/www.scientific.net/AMR.605-607.2095

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 605-607An FPGA Based Frame Rate Enhancer for LCD Display...

An FPGA Based Frame Rate Enhancer for LCD Display in Embedded Systems

Abstract:

CPUs in embedded systems sometimes have limited performance for the sake of cost, so there may be impossible for these systems to drive a LCD display with a high frame rate. An FPGA based schema is proposed to increase the frame rate of the LCD display so that the texts etc. can be seen fluently. The frame rate enhancer is composed of three parts, an FPGA for receiving the data to be displayed, an SDRAM for data storage and an LCD controller for display control. The designed frame rate enhancer can be used in an embedded system, which has a large LCD display but a low performance CPU, without any flicker.

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Periodical:

Advanced Materials Research (Volumes 605-607)

Pages:

2095-2099

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.605-607.2095

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Online since:

December 2012

Authors:

Kang Ping Xu, Ji Ye Huang, Hui Jiang Liang, Zhi Wei He, Ming Yu Gao

Keywords:

Embedded System, Field-Programmable Gate Array (FPGA), Frame Rate Enhancer, LCD Display

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