A Current Reused Divided-by-Two Frequency Divider

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In this paper, a low power dissipation divide-by-two frequency divider is presented. The master latch and the slave latch of the divide-by-two frequency divider are stacked in cascode to reuse the current. The frequency divider can operate with only half the current of a conventional divider. A divide-by-two frequency divider based on the proposed topology is designed and simulated in a 0.18μm 1P6M CMOS process. Simulation results show the frequency divider can operate up to 11GHz with only 0.66mW power dissipation under 1.8V supply voltage. And it also demonstrates good phase noise performance.

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119-123

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February 2013

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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[1] A. Bonfanti, A. Tedesco, C. Samori, and A.L. Lacaita: A 15-GHz broad-band ÷2 frequency divider in 0. 13-μm CMOS for quadrature generation. Microwave and Wireless Components Letters, IEEE, vol. 15 (2005), pp.724-726.

DOI: 10.1109/lmwc.2005.858997

Google Scholar

[2] O. Nam-Jin and L. Sang-Gug: Current reused LC VCOs. Microwave and Wireless Components Letters, IEEE, vol. 15 (2005), pp.736-738.

DOI: 10.1109/lmwc.2005.858993

Google Scholar

[3] P. Kyung-Gyu, J. Chan-Young, P. Jae-Woo, L. Jang-Woo, J. Jun-Gi, and Y. Changsik: Current Reusing VCO and Divide-by-Two Frequency Divider for Quadrature LO Generation. Microwave and Wireless Components Letters, IEEE, vol. 18 (2008), pp.413-415.

DOI: 10.1109/lmwc.2008.922674

Google Scholar

[4] L.L.K. Leung and H.C. Luong: A 1-V 9. 7-mW CMOS Frequency Synthesizer for IEEE 802. 11a Transceivers. Microwave Theory and Techniques, IEEE Transactions on, vol. 56 (2008), pp.39-48.

DOI: 10.1109/tmtt.2007.911980

Google Scholar

[5] C.S. Vaucher, I. Ferencic, M. Locher, S. Sedvallson, U. Voegeli, and Z. Wang: A family of low-power truly modular programmable dividers in standard 0. 35-um CMOS technology. Solid-State Circuits, IEEE Journal of, vol. 35 (2000), pp.1039-1045.

DOI: 10.1109/4.848214

Google Scholar

[6] Z. Gu and A. Thiede: 18 GHz low-power CMOS static frequency divider. Electronics Letters, vol. 39 (2003), pp.1433-1434.

DOI: 10.1049/el:20030932

Google Scholar

[7] N. Roberto, P. Enzo, P. Pierpaolo, and S. Luca: A Design Methodology for MOS Current-Mode Logic Frequency Dividers. Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 54 (2007), pp.245-254.

DOI: 10.1109/tcsi.2006.885999

Google Scholar