Design of Video-Decoding System Based on the FPGA

Article Preview

Abstract:

The design and implementation of video-decoding system are analyzed. And then, the video decoding and data processing scheme based on the FPGA and video-decoding chip ADV7181B is proposed. The I2C interface, used to configurate the register parameters of video-decoding chip ADV7181B, and the decoder of ITU-656, the storage of YCrCb, conversion between YCrCb and RGB and the display of VGA are implemented using FPGA. The all sub modules were described using Verilog HDL in the design, and merged in a module after they were emulated successfully. The module was come through and verified. The experiments results show that the system designed in this paper performed well.

You might also be interested in these eBooks

Info:

Periodical:

Pages:

140-145

Citation:

Online since:

August 2013

Export:

Price:

Permissions CCC:

Permissions PLS:

Сopyright:

© 2013 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] Lei Dandan, Jiang Hongxu, Li Bo, Ji Xiaonan. A Multi-DSP Based Low-Latency Video Processing System . The 1st International Conference on Information Science and Engineering.26-28 Dec, 2009, Beijing, China:1055-1058.

DOI: 10.1109/icise.2009.73

Google Scholar

[2] PENG Liang, LAI Ru, YANG Xiaodong, CUI Jie, WU Guoqiang. Design and Implementation of Video Image Acquisition and Processing System Based on CPLD. Proceedings of the 29th Chinese Control Conference, July 29-31, 2010, Beijing, China:2884-2888.

Google Scholar

[3] YANG Jing, LI Han-dong. ARM and CPLD-Based Embedded Digital Image Processing System. MACHINERY & ELECTRONICS, 2010,7(1):203-205.

Google Scholar

[4] ZHU Yi-dan, FANG Yi-bing. Image acquisition and VGA display system based on FPGA . Journal of Computer Applications, 2011, 5:1258-1264.

DOI: 10.3724/sp.j.1087.2011.01258

Google Scholar

[5] Zheng-wei HU. I2C Protocol Design for Reusability . Information Processing (ISIP), 2010 Third International Symposium on. 15-17 Oct, 2010:83-86.

DOI: 10.1109/isip.2010.51

Google Scholar

[6] P.Venkateswaran, Madhumita Mukherjee, Arindam Sanyal, Snehasish Das and R. Nandi. Design and Implementation of FPGA Based Interface Model for Scale-Free Network using I2C Bus Protocol on Quartus II 6.0. 2009 International Conference on Computers and Devices for Communication . 14-16 Dec, 2009:1-4.

Google Scholar

[7] GUO Cai-xia, MEI Da-cheng, YANG Yong-chao. Video processing system based on FPGA . Information Technology, 2009, 3:108-111.

Google Scholar

[8] ZHU Dong-wei, CHEN Chen, WU Cheng-ke. Design of Color Space Converter & Realization of FPGA . Circuits & Their Applications, 2005, 10:24-26.

Google Scholar

[9] Van-Huan Tran, Xuan-Tu Tran. An Efficient Architecture Design for VGA Monitor Controller . Consumer Electronics, Communications and Networks (CECNet), 2011 International Conference on: 3917-3921.

DOI: 10.1109/cecnet.2011.5768261

Google Scholar