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Implementation and Design of Voltage-Mode PFM Control Buck Power Converter
Abstract:
A lower power consumption, smaller output ripple and better regulation buck dcdc converter controlled by voltage feedback and pulse-frequency modulation (PFM) mode is implemented in this paper. The converter operating in discontinuous conduction mode (DCM) is designed and simulated using the TSMC 0.18μm 1P6M CMOS Process. Hspice simulation results show that, the buck converter having chip size with power dissipation about 0.68mW. This chip can operate with input supply voltage from 1.2V to 1.8V, and switching frequency from 249KHz () to 50KHz (), and its output voltage can stable at 1.0V and less than 110mV ripple voltage at maximum loading current 100 mA.
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Pages:
2390-2394
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Online since:
December 2013
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© 2014 Trans Tech Publications Ltd. All Rights Reserved
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