DSP Memory Allocation Strategy Based on Greedy Algorithm

Yan Hong Fan; Xiao Feng Ma; Jing Sai Jiang; Xiao Mei Xu; Qiu Yun Hao; Peng Zhang

doi:10.4028/www.scientific.net/AMR.989-994.1946

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 989-994DSP Memory Allocation Strategy Based on Greedy...

DSP Memory Allocation Strategy Based on Greedy Algorithm

Abstract:

In practical applications of DSP systems, DSP chips with limited on-chip RAM resources are often chosen to reduce cost. In this condition, part of the codes has to be stored in FLASH or expanded RAM and thus can not run at full speed. This paper presents a strategy of allocating the on-chip RAMs to obtain the maximum system performance. First, the memory allocation problem is described as the knapsack problem, and then the greedy algorithm is applied. Experimental results show that the overall execution efficiency can be improved by 10% when the on-chip RAMs are rather limited. Therefore, the proposed memory allocation method is efficient for low-cost design to obtain higher performance.

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Periodical:

Advanced Materials Research (Volumes 989-994)

Pages:

1946-1950

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.989-994.1946

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Online since:

July 2014

Authors:

Yan Hong Fan*, Xiao Feng Ma, Jing Sai Jiang, Xiao Mei Xu, Qiu Yun Hao, Peng Zhang

Keywords:

DSP Memory Allocation, Greedy Algorithm, Knapsack Problem

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