LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

Yi Tsun Chang; Yu Da Shiau; Po Chun Wu; Ren Hao Xue; Po Yu Cheng

doi:10.4028/www.scientific.net/AMR.989-994.3236

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 989-994LDO of High Power Supply Rejection with Two-Stage...

LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation

Abstract:

This study develops a low dropout regulator linear regulator, characterized by a high power supply rejection ratio using ultra-low output resistance buffer and two-stage error amplifiers. The high power supply rejection is based on a closed-loop LDO regulator. The ultra-low output resistance buffer achieves ultra-low output impedance with dual shunt feedback loops, subsequently improving load and line regulations, as well as the transient response for low voltage applications. The proposed LDO regulator linear regulator functions under an input voltage of 1.8~3V, and the output voltage can be maintained at around 1.27V. Moreover, its output voltage is independent of input voltage. The proposed regulator is applicable to light-emitting diode driver integrated circuits. The layout chip area of the LDO linear regulator is 21.5μm × 42.6μm.

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Periodical:

Advanced Materials Research (Volumes 989-994)

Pages:

3236-3239

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.989-994.3236

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Online since:

July 2014

Authors:

Yi Tsun Chang*, Yu Da Shiau, Po Chun Wu, Ren Hao Xue, Po Yu Cheng

Keywords:

Compensation, Error Amplifier, LDO, Power Supply Rejection Ratio, Ultra-Low Output Buffer

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