Integration of STT-MRAMs for Embedded Cache Memories

Toshihiro Sugii; Yoshihisa Iba; Masaki Aoki; Hideyuki Noshiro; Kouji Tsunoda; Akiyoshi Hatada; Masaaki Nakabayashi; Yuuichi Yamazaki; Atsushi Takahashi; Chikako Yoshida

doi:10.4028/www.scientific.net/AST.95.146

Paper Titles

Thermal Properties of In-Sb-Te Thin Films for Phase Change Memory Application
p.113

Thermal Conductivity Measurement of a Sb₂Te₃ Phase Change Nanowire
p.120

MRAM Concepts for Sub-Nanosecond Switching and Ultimate Scalability
p.126

Doped Hafnium Oxide – An Enabler for Ferroelectric Field Effect Transistors
p.136

Integration of STT-MRAMs for Embedded Cache Memories
p.146

Superconductivity at T_c = 36.5 K in Na-Substituted SrFe₂As₂ Single Crystals
p.150

Role of Mg-B-O Nanostructural Inhomogenities on the Performance of Superconducting MgB₂
p.156

Microwave Measurements of Surface Resistance and Complex Conductivity of NdBaCuO Films
p.162

Critical Current Density and Pinning Energy of Partial Melted Sm-Based Superconductor
p.169

HomeAdvances in Science and TechnologyAdvances in Science and Technology Vol. 95Integration of STT-MRAMs for Embedded Cache...

Integration of STT-MRAMs for Embedded Cache Memories

Abstract:

We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration with the back-end-of-line (BEOL) process to replace conventional embedded SRAM cache memories. Our MRAM technology features a top-pinned, perpendicular magnetic tunnel junction (MTJ) and a highly reliable MTJ for a cache memory. We could obtain a higher density cache memory than that with conventional SRAMs with our STT-MRAMs, and leakage free characteristics, as well as unlimited write and read cycling times and 10-year time-dependent dielectric breakdown (TDDB) characteristics. They were integrated into Cu interconnects with 300 mm facilities. We also discuss variations in MTJ pattern sizes that are very important for memory applications from the viewpoint of high density embedded cache memories.