The Study of Underfill Epoxy Hardness in Reducing Curing Process Time for Flip Chip Packaging

Article Preview

Abstract:

Underfilling is the vital process to reduce the impact of the thermal stress that results from the mismatch in the co-efficient of thermal expansion (CTE) between the silicon chip and the substrate in Flip Chip Packaging. This paper reported the pattern of underfill’s hardness during curing process for large die Ceramic Flip Chip Ball Grid Array (FC-CBGA). A commercial amine based underfill epoxy was dispensed into HiCTE FC-CBGA and cured in curing oven under a new method of two-step curing profile. Nano-identation test was employed to investigate the hardness of underfill epoxy during curing steps. The result has shown the almost similar hardness of fillet area and centre of the package after cured which presented uniformity of curing states. The total curing time/cycle in production was potentially reduced due to no significant different of hardness after 60 min and 120 min during the period of second hold temperature.

You might also be interested in these eBooks

Info:

Periodical:

Key Engineering Materials (Volumes 462-463)

Pages:

1194-1199

Citation:

Online since:

January 2011

Export:

Price:

Permissions CCC:

Permissions PLS:

Сopyright:

© 2011 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] M. Ying, A. Teng, Y.C. Chea: IEEE Elec. Pack. Tech. Conf. (Singapore 2007), p.805.

Google Scholar

[2] E. Goh, X. L. Zhao, A. Anand and Y. C. Mui: IEEE Elec. Pack. Tech Conf. (Singapore 2005), p.215.

Google Scholar

[3] J. Taweeplengsangsuke and R.A.  Pearson: IEEE Adh. Join. and Coat. Tech. in Elect. Manufact. (Hong Kong 2000), p.174.

Google Scholar

[4] Z. Kornain, A. Jalar, R. Rashid, S. Abdullah: Adv. Mater. Research Vol. 97 (2010), p.23.

Google Scholar

[5] W.C. Oliver and G. M. Pharr: J. Mater. Res. Vol. 19 (2004), p.3.

Google Scholar

[6] X. Li, H. Gao, W. A. Scrivens, D. Fei, X. Xu, M. A. Sutton, A. P. Reynolds, and M. L. Myrick : Nanotech. Vol. 15. (2004), p.1416.

Google Scholar

[7] A. K. Dutta, D. Penumadu, and B. Files : J. Mater. Res. Vol. 19 (2004), p.158.

Google Scholar

[8] T. Y. Wu, Y. Tsukada, and W. T. Chen: IEEE Elec. and Comp. Tech. Conf. (1996), p.524.

Google Scholar