Effects of Cu Contamination on the Electrical Properties of Multicrystalline Silicon Purified by Directional Solidification Route

Jiao Li; Xiu Hua Chen; Wen Hui Ma; Cong Zhang; Kui Xian Wei

doi:10.4028/www.scientific.net/MSF.809-810.846

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HomeMaterials Science ForumMaterials Science Forum Vols. 809-810Effects of Cu Contamination on the Electrical...

Effects of Cu Contamination on the Electrical Properties of Multicrystalline Silicon Purified by Directional Solidification Route

Abstract:

The multicrystalline silicon wafers purified by directional solidification route were used to introduce copper impurities. The resistivity and minority carrier lifetime of multicrystalline silicon wafers were investigated by four-point probe resistivity tester and μ-PCD, respectively. Annealing temperature, atmosphere and cooling rate were researched. It was found that copper contaminants have a greater impact on the electrical properties of multicrystalline silicon. Research results showed that copper impurities tend to exist at defect sites at high temperature, and high annealing temperature, argon atmosphere and slow cooling conditions make more impact on the electrical properties of multicrystalline silicon than low annealing temperature, air atmosphere and fast cooling.

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2014 China Functional Materials Technology and Industry Forum

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Materials Science Forum (Volumes 809-810)

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846-851

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https://doi.org/10.4028/www.scientific.net/MSF.809-810.846

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Online since:

December 2014

Authors:

Jiao Li*, Xiu Hua Chen, Wen Hui Ma, Cong Zhang, Kui Xian Wei

Keywords:

Copper Contamination, Minority Carrier Lifetime, Multicrystalline Silicon, Resistivity

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