Papers by Author: C. Mark Johnson

Abstract: Silicon Carbide (SiC) power devices are increasingly in demand for operations which require ambient temperature over 300°C. This paper presents circuit applications of normally-on SiC VFETs at temperatures exceeding 300°C. A DC-DC boost converter using a 4H-SiC VJFET and a SiC Schottky Diode was fabricated and operated up to 327°C. A power amplifier achieved a voltage gain of 3.88 at 27°C dropping to 3.16 at 327°C. This 20 % reduction is consistent with the fall in transconductance of the device.

Abstract: A novel high temperature wire bondless packaging technique is numerically investigated in this paper. Extraction of device effective resistivity with temperature from numerical characteristics of 1.2kV 4H-SiC MOSFETs at a current density of 400A/cm2 have demonstrated a T−2 temperature dependence. Electro-thermal finite element analysis (FEA) of 1.2kV 4H-SiC MOSFETs sandwiched between two etched direct-bonded-copper substrate tiles has been performed. The thermal resistance of the ceramic sandwich package shows a 75% reduction in thermal resistance compared to conventional wire bonded assemblies. Mechanical analysis of the assembly has been used to investigate the residual stresses in the SiC dies at room temperature, which are then alleviated at higher temperatures during device operation. Mismatch of the expansion coefficients of the auxiliary materials in the assembly result in elevated stresses at full load operation, however these are well below the tensile strength of the respective materials and hence do not compromise the mechanical integrity of the package.

Abstract: High voltage 4H-SiC Schottky diodes with single-zone junction termination extension (JTE) have been fabricated and characterised. Commercial 4H-SiC epitaxial wafers with 10, 20 and 45 +m thick n layers (with donor concentrations of 3×1015, 8×1014 and 8×1014 cm-3, respectively) were used. Boron implants annealed under argon flow at 1500°C for 30 minutes, without any additional protection of the SiC surface, were used to form JTE’s. After annealing, the total charge in the JTE was tuned by reactive ion etching. Diodes with molybdenum Schottky contacts exhibited maximum reverse voltages of 1.45, 3.3 and 6.7 kV, representing more than 80% of the ideal avalanche breakdown voltages and corresponding to a maximum parallel-plane electric field of 1.8 MV/cm. Diodes with a contact size of 1×1 mm were formed on 10 +m thick layers (production grade) using the same device processing. Characterisation of the diodes across a quarter of a 2-inch wafer gave an average value of 1.21 eV for barrier heights and 1.18 for ideality factors. The diodes exhibited blocking voltages (defined as the maximum voltage at which reverse current does not exceed 0.1 mA) higher than 1 kV with a yield of 21 %.

Abstract: 4H-SiC depletion mode (normally-on) VJFETs were fabricated and characterised at temperatures up to 377 °C. The device current density at drain voltage of 50 V drops down from 54 A/cm2 at room temperature to around 42 A/cm2 at 377 °C which is a 20 % reduction in drain current density. This drop in drain currents is much lower than previously reported values of a 30 % drop in JFETs at high temperatures. The average temperature coefficient of the threshold voltage was found to be -1.36 mV/°C which is smaller than for most Si FETs. We have found that these devices have shown good I-V characteristics upto 377 °C along with being able to retain its characteristics on being retested at room temperature.

Abstract: In this paper a novel approach to the design and fabrication of a high temperature inverter module for hybrid electrical vehicles is presented. Firstly, SiC power electronic devices are considered in place of the conventional Si devices. Use of SiC raises the maximum practical operating junction temperature to well over 200°C, giving much greater thermal headroom between the chips and the coolant. In the first fabrication, a SiC Schottky barrier diode (SBD) replaces the Si pin diode and is paired with a Si-IGBT. Secondly, doublesided cooling is employed, in which the semiconductor chips are sandwiched between two substrate tiles. The tiles provide electrical connections to the top and the bottom of the chips, thus replacing the conventional wire bonded interconnect. Each tile assembly supports two IGBTs and two SBDs in a half-bridge configuration. Both sides of the assembly are cooled directly using a high-performance liquid impingement system. Specific features of the design ensure that thermo-mechanical stresses are controlled so as to achieve long thermal cycling life. A prototype 10 kW inverter module is described incorporating three half-bridge sandwich assemblies, gate drives, dc-link capacitance and two heat-exchangers. This achieves a volumetric power density of 30W/cm3.

Abstract: Hole initiated avalanche multiplication characteristics of 4H-SiC avalanche photodiodes have been studied. The diodes had n+-n-p SiC epitaxial layers grown on a p-type substrate. These 1 mm2 devices had very low dark currents and exhibited sharp breakdown at voltages of approximately 500V. The diodes multiplication characteristics appeared to be identical when the wavelength of the illuminating light from the top varied from 288 to 325nm, implying that almost pure hole initiated multiplication was occurring. The multiplication factor data were modelled using a local multiplication model with impact ionization coefficients of 4H-SiC reported by various authors. The impact ionization coefficients extracted from submicron devices by Ng et al. were found to give accurate predictions for multiplication factors within the uncertainties of the doping levels. This result suggests that their ionization coefficients can be applied to thicker bulk 4H-SiC structures.

Abstract: Structural properties of Ni/Ti films deposited on 4H-SiC and annealed at temperatures from 800 to 1040°C have been studied. Films with three different metal deposition sequences were investigated by X-ray diffraction and Auger electron spectroscopy: (A) Ti(100 nm)/Ni(50 nm); (B) Ti(4 nm)/Ni(50 nm)/Ti(100 nm); and (C) Ti(4 nm)/Ni(150 nm). A distinct spatial separation of nickel silicide and titanium carbide layers was observed in all samples. It was discovered that the distribution of the products of the solid state chemical reaction in samples (A) and (B) was independent on the deposition sequence of Ti and Ni layers. The titanium carbide layer located on the interface and covered by the clearly separated nickel silicide layer was detected in both samples after heat treatments.

Abstract: 4H-SiC diodes with nickel silicide (Ni2Si) and molybdenum (Mo) Schottky contacts have been fabricated and characterised at temperature up to 400°C. Room temperature boron implantation has been used to form a single zone junction termination extension. Both Ni2Si and Mo diodes revealed unchanging ideality factors and barrier heights (1.45 and 1.3 eV, respectively) at temperatures up to 400°C. Soft recoverable breakdowns were observed both in Ni2Si and Mo Schottky diodes at voltages above 1450 V and 3400 V depending on the epitaxial structure used. These values are about 76% and 94% of the ideal avalanche breakdown voltages. The Ni2Si diodes revealed positive temperature coefficients of breakdown voltage at temperature up to 240°C.

Abstract: Physics-based analytical models are seen as an efficient way of predicting the characteristics of power devices since they can achieve high computational efficiency and may be easily calibrated using parameters obtained from experimental data. This paper presents an analytical model for a 4H-SiC Enhancement Mode Vertical JFET (VJFET), based on the physics of this device. The on-state and blocking behaviour of VJFETs with finger widths ranging from 1.6+m to 2.2+m are studied and compared with the results of finite element simulations. It is shown that the analytical model is capable of accurately predicting both the on-state and blocking characteristics from a single set of parameters, underlining its utility as a device design and circuit analysis tool.