Papers by Author: Dai Okamoto

Abstract: 13-kV 4H-SiC PiN diodes were fabricated on 4° and 8° off-axis substrates and their electrical properties were examined. Small test PiN diodes with various JTE concentrations were fabricated and the dependence of JTE concentration was examined. The highest breakdown voltages were 14.6 and 14.1 kV at a JTE1 concentration of 1.9 × 10¹⁷ cm⁻³ for both the 4° and 8° off-axis substrates. Based on the results, 4 mm × 4 mm SiC PiN diodes were successfully fabricated and exhibited avalanche breakdown voltages of 14.0 and 13.5 kV for the 4° and 8° off-axis substrates, respectively. Forward voltage degradation was larger for the 8° off-axis substrates.

Abstract: We have evaluated the reliability of POCl3-annealed oxides on 4H-SiC using time-zero dielectric breakdown (TZDB), constant current time-dependent dielectric breakdown (CC-TDDB), and high-frequency capacitance-voltage (C-V) measurements after electron injection. The POCl3 annealing does not deteriorate oxide breakdown field very much, still keeping an average value of larger than 9 MV/cm. However, the electron injection into POCl3-annealed oxide brings negative charges easily. From the C-V measurements, the POCl3-annealed capacitors were found to indicate a large positive flatband voltage shift after electron injection. Phosphorus atoms in the oxide may be related to the trapping site of injected electrons. The distribution and density of phosphorus in the oxide should be optimized to realize highly reliable 4H-SiC MOSFETs with high performance.

Abstract: In this article, we show some new results regarding the electrical properties of 4H-SiC MOSFETs fabricated by thermal annealing using POCl₃. The temperature dependence of MOSFET properties is described and the effect of POCl₃ annealing followed by forming gas annealing is shown. POCl₃-annealed MOSFETs indicates negative temperature dependence of channel mobility and smaller change in threshold voltage. Forming gas anneal after the POCl₃ treatment further improves channel mobility up to about 101 cm²/Vs. Features and problems of P-doped oxide are summarized and the future challenges are described.

Abstract: We investigated electrical properties of 4H-SiC trench metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated on (000_,1) C-face substrates with various off-axis angles. Off-axis angles and directions are 4o, 8o, and 15o towards [__,1120] and 8o towards [1_,100] directions. Most trench MOSFETs showed good on-state performance. Peculiar characteristics that field-effect mobility was 103 cm2/Vs in spite of a relatively high acceptor concentration of 1 × 1017 cm−3 in the channel region were observed for trench MOSFET on 15o-off substrates. From crystallographic analysis, this face is (11_,20) with 15o off towards [000_,1] direction. We can expect that this face has quite good MOS interface properties.

Abstract: Instability of metal-oxide-semiconductor field-effect transistor (MOSFET) characteristics was evaluated by DC and pulse current-voltage (I-V) measurements. MOSFETs with nirided gate oxides were fabricated on C-face 4H-SiC. Their interfaces have near interface traps (NITs) with long time constants, depending on the cooling down process after nitridation. Such devices exhibited a large hysteresis in DC I-V and a large transient current in pulse I-V measurements. These phenomena can be explained by the charge state of NITs due to capture/emission of electrons in the channel.

Abstract: Metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) were fabricated on C-face 4H-SiC with post-oxidation annealing in phosphorus- containing atmosphere. POCl3/N2 annealing at 1000 °C, which is an effective condition for Si-face, did not bring any improvement in the interface state density (Dit) for C-face due to additional oxide growth. We have developed a new process sequence suitable for C-face MOS structures. As a result, the Dit near the conduction band edge was drastically decreased by the developed process to less than 3x1011 cm−2eV−1. The field-effect mobility of C-face 4H-SiC MOSFETs was effectively increased to 37 cm2/Vs. We found that the incorporation of phosphorus atoms into the SiO2/SiC interface can improve MOSFET performance not only for the Si-face but also for the C-face.

Abstract: We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.

Abstract: Characteristics of metal–oxide–semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) fabricated by direct oxidation of C-face 4H-SiC in NO were investigated. It was found that nitridation of the C-face 4H-SiC MOS interface generates near-interface traps (NITs) in the oxide. These traps capture channel mobile electrons and degrade the performance of MOSFETs. The NITs can be reduced by unloading the samples at room temperature after oxidation. It is important to reduce not only the interface states but also the NITs to fabricate high-performance C-face 4H-SiC MOSFETs with nitrided gate oxide.

Abstract: A change in the interface state density in 4H-SiC metal–oxide–semiconductor (MOS) structures by incorporation of various elements was systematically investigated. B, N, F, Al, P, and Cl ions were implanted prior to the oxidation and introduced at the SiO2/SiC interface by subsequent thermal oxidation. Interface state density near the conduction band edge for Al-, B-, F-, and Cl-implanted MOS capacitors increased with implantation dose. On the other hand, a strong reduction of the interface state density was observed for N- and P-implanted samples when the implantation dose was larger than 5.0 × 1012 cm−2. It was found that the interface state density can be reduced by P as well as N.

Abstract: This paper describes the influence of the geometric component in the charge-pumping measurement of 4H-SiC MOSFETs. Charge-pumping measurements were conducted on 4H-SiC MOSFETs with and without NO annealing. Charge-pumping measurements with different pulse-fall times revealed that the geometric component exists in 4H-SiC MOSFETs and is especially large in the unannealed MOSFETs. A sufficiently long fall-time is needed to minimize its effect, which is expected to be 1–10 μs for 4H-SiC MOSFETs with a gate length of 10 μm.