Papers by Author: Q. Jon Zhang

Abstract: Basal plane dislocations (BPDs) introduced into SiC epitaxial layers, 25 μm thick, by the combination of implantation and activation anneal are directly observed by ultraviolet photoluminescence (UVPL) imaging. BPD loops appear to originate at micron-sized or smaller areas at the surface. These loops expand by gliding along the basal plane in the offcut direction until the loops approach the substrate. The loops can glide perpendicular to the offcut direction by many millimeters.

Abstract: Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Cree’s Z-FET™ product. This paper discusses the key reliability results from Time-Dependent-Dielectric-Breakdown (TDDB) and High Temperature Gate Bias (HTGB) measurements that indicate that the SiC MOSFETs can demonstrate excellent lifetime and stable operation in the field.

Abstract: The Army Research Laboratory has collaborated with Cree, Inc. and Silicon Power Corp. to develop 9 kV-blocking, 1.0 cm² Super-GTOs. In this study, several 1.0 cm² GTOs were individually switched up to 6.0 kA in a low-inductance, high dI/dt (2.1 kA/µs) circuit to evaluate turn-on delay and optimize the gate control. Turn-on delay was evaluated relative to gate drive current, and the delay was reduced by 1.1 µs when gate amplitude was increased from 1 A to 8 A. Increasing gate current delivered to each GTO also successfully reduced variation in turn-on delay from device to device by at least 50%, and mitigated mismatch in turn-on between pairs of GTOs switched in parallel. As silicon carbide material processing and device development continue to evolve, the ultimate solution will be to reduce remaining material defects and to control minority carrier diffusion length through more uniform doping across the wafer. These steps will enable modules of parallel GTOs to perform at maximum capability.

Abstract: In this paper, for the first time, we report 12 kV, 1 cm² SiC GTOs demonstrated with a novel negative bevel termination, which improves the breakdown voltage by >3.5 kV compared to the conventional multiple-zone Junction Termination Extension (JTE). The significant improvement in the blocking voltage was attributed to the elimination of the electrical field crowding in the periphery of the mesa with conventional JTE termination. This new termination has been used in both electrically and optically triggered SiC GTOs. An ultrafast turn-on speed of 70 ns has been measured on 12 kV, 1 cm² SiC light triggered GTOs.

Abstract: DMOSFETs fabricated in 4H-SiC with capabilities for blocking in excess of 1700V and conducting 20A continuous current in the on-state are presented. These SiC DMOSFETs remain functional to temperatures in excess of 225°C, with leakage current at 1700V at 225°C of less than 5 A with VGS = 0V. The DMOSFETs show excellent switching characteristics, with total switching energy of 1.8 to 1.95 mJ over the entire temperature range of testing (25°C to 200°C), when switched from the blocking state at 1200V to conducting at 20A in a clamped inductive load switching circuit. The electrical characteristics are compared to commercially available Si IGBTs rated to 1700V with similar current ratings as the SiC DMOSFET described herein.

Abstract: In this paper, very fast switch-off of high voltage 4H–SiC npn Bipolar Junction Transistors (BJTs) driven in deep saturation regime is reported. It is shown that the switch-off time can be as short as 4 ns if a reverse base current pulse is applied that provides forced minority carrier sweep out from the base.

Abstract: DC characteristics of 4H-SiC p-channel IGBTs capable of blocking -12 kV and conducting -0.4 A (-100 A/cm2) at a forward voltage of -5.2 V at 25°C are demonstrated for the first time. A record low differential on-resistance of 14 mW×cm2 was achieved with a gate bias of -20 V indicating a strong conductivity modulation in the p-type drift region. A moderately doped current enhancement layer grown on the lightly doped drift layer effectively reduces the JFET resistance while maintains a high carrier lifetime for conductivity modulation. A hole MOS channel mobility of 12.5 cm2/V-s at -20 V of gate bias was measured with a MOS threshold voltage of -5.8 V. The blocking voltage of -12 kV was achieved by Junction Termination Extension (JTE).

Abstract: For the first time, high power 4H-SiC n-IGBTs have been demonstrated with 13 kV blocking and a low Rdiff,on of 22 mWcm2 which surpasses the 4H-SiC material limit for unipolar devices. Normally-off operation and >10 kV blocking is maintained up to 200oC base plate temperature. The on-state resistance has a slight positive temperature coefficient which makes the n-IGBT attractive for parallel configurations. MOS characterization reveals a low net positive fixed charge density in the oxide and a low interface trap density near the conduction band which produces a 3 V threshold and a peak channel mobility of 18 cm2/Vs in the lateral MOSFET test structure. Finally, encouraging device yields of 64% in the on-state and 27% in the blocking indicate that the 4H-SiC n-IGBT may eventually become a viable power device technology.

Abstract: 4H-SiC BJTs with a common emitter current gain (b) of 108 at 25°C have been demonstrated. The high current gain was accomplished by using a base as thin as 0.25 μm. The current gain decreases at high temperatures but is still greater than 40 at 300°C. The device demonstrates an open emitter breakdown voltage (BVCBO) of 1150 V, and an open base breakdown voltage (BVCEO) of 250 V. A low specific on-resistance of 3.6 mW-cm2 at 25°C was achieved. The BJTs have shown blocking capabilities over a wide range of operating temperatures up to 300°C.

Abstract: DC characteristics and reverse recovery performance of 4H-SiC Junction Barrier Schottky (JBS) diodes capable of blocking in excess of 10 kV with forward conduction of 20 A at a forward voltage of less than 4 V are described. Performance comparisons are made to a similarly rated 10 kV 4H-SiC PiN diode. The JBS diodes show a significant improvement in reverse recovery stored charge as compared to PiN diodes, showing half of the stored charge at 25°C and a quarter of the stored charge at 125°C when switched to 3 kV blocking. These large area JBS diodes were also employed to demonstrate the tremendous advances that have recently been made in 4H-SiC substrate quality.