Papers by Author: Sang Cheol Kim

Abstract: We investigated the effect of the substrate temperature on the electrical and the optical properties of ZnO/4H-SiC structures. The n-type ZnO layer was grown on p-type 4H-SiC substrate by pulsed laser deposition to form p-n hetero-junction diode structure. The n-type ZnO thin films were deposited by pulsed laser deposition at different temperatures of 200, 400, and 600 °C, respectively. It was shown from transmission line method (TLM) and auger electron spectroscopy (AES) data that the sheet resistance of ZnO on SiC was increases from ~760 Ω/square to ~4000 Ω/square as the deposition temperature increases and the oxygen outdiffusion decreases. The I-V characteristics with and without illumination has also been studied.

Abstract: The characteristics of Ga-doped zinc oxide (GaZnO) thin films deposited at different substrate temperatures (TS~250 to 550oC) on 4H-SiC have been investigated. Structural and electrical properties of GaZnO thin film on n-type 4H-SiC (100)were investigated by using x-ray diffraction, atomic force microscopy (AFM), Hall effect measurement, and Auger electron spectroscopy (AES). Hall mobility is found to increase as the substrate temperature increase from 250 to 550 oC, whereas the lowest resistivity (~3.3 x 10-4 Ωcm) and highest carrier concentration (~1.33x1021cm-3) values are observed for the GaZnO films deposited at 400 oC. It has been found that the c-axis oriented crystalline quality as well as the relative amount of activated Ga3+ Introduction ions may affect the electrical properties of GaZnO films on SiC.

Abstract: The 50W Quasi-resonant mode SMPS which adopted a normally-on-type SiC JFET as a switch has been designed and characterized. A simple decision circuit and an auxiliary power supply was utilized to safely protect the JFET from an in-rush current at initial operation stage and to provide sufficient negative voltage for a complete JFET drive. Even without a refine engineering, the SMPS showed 96% efficiency at a full load state.

Abstract: The effects of post annealing etch process on electrical performances of a 4H-SiC Schottky diodes without any edge termination were investigated. The post etch was carried out using various dry the dry etch techniques such as Inductively Coupled Plasma (ICP) and Neutral Beam Etch (NBE) in order to eliminate suspicious surface damages occurring during a high temperature ion activation process. The leakage current of diodes treated by NBE measured at -100V was about one order lower than that of diode without post etch and a half times lower than that of diode treated by ICP without a significant degradation of forward electrical characteristics. Based on the above results, the post annealing process was adapted to a junction barrier Schottky diode with a field limiting ring. The blocking voltages of diode without post annealing etch and diodes treated by ICP and NBE were -1038V, -1125V, and -1595V, respectively.

Abstract: The effect of the doping concentration and space of both p-grid and FLR on the electrical performances of 4H-SiC JBS diode has been investigated. A 4H-SiC JBS diode with the p-grid space of 3um, the FLR space of 3um, and the doping concentration of 5E18cm-3 showed the highest blocking voltage of 1500V.

Abstract: We have investigated the field limiting ring (FLR) geometry dependence of breakdown voltage characteristics for a junction barrier Schottky (JBS)-assisted FLR SiC-SBD. The SiC-SBDs having a guard ring-assisted FLR surrounding a Schottky contact edge and an internal ring inside Schottky contact were fabricated. The breakdown voltage characteristics of the JBS-assisted FLR SiC-SBD are significantly dependent on the width, spacing, and number of FLR. The breakdown voltage characteristic is improved as either the FLR width and FLR number increase or the FLR spacing decreases. Approximately 1650 V maximal breakdown voltage, corresponding to 82% ideal breakdown voltage, is observed with seven FLRs having 5 2m width and 1 2m spacing.

Abstract: This paper demonstrates the breakdown voltage characteristics of different edge termination structures including aluminum (Al)-deposited guard ring and Al-deposited guard ringassisted field limiting ring (FLR) for a 4H silicon carbide (SiC) Schottky barrier diode (SBD). In order to investigate the application feasibility of the Al-deposited junction termination to a high breakdown voltage SiC-SBD, two types of SiC-SBDs are fabricated using conventional photolithography, electron beam evaporation, and thermal treatment techniques without ion implantation and thermal oxidation procedures. The breakdown voltage characteristics of the SiCSBDs are significantly dependent on the Al-deposited edge termination. The SiC-SBD without the Al-deposited edge termination shows less than 250 V breakdown voltage, while the Al-deposited guard ring and Al-deposited guard ring-assisted FLR structures show roughly 700 V and 1200 V breakdown voltages, respectively. The prominent improvement in the breakdown voltage characteristics is attributed to the electric field lowering at the Schottky contact edge by the Al deposition edge termination.

Abstract: A double delta-doped channel 4H-SiC MESFET is proposed to kick out degradation of the DC and RF performances caused by the surface traps, by forming a quantum-well-like potential well and separating an effective channel from the surface. To obtain an optimum device structure, the DC and RF performances of double delta-doped channel MESFETs having various delta-doping concentrations but the same pinch-off voltage with that of conventional MESFET were also investigated. The SilvacoTM simulation results show that the double delta-doped channel MESFET achieved more improvement of the drain current, the cut-off frequency, and the maximum oscillation frequency for higher delta-doping concentration near the gate. In all cases, DC and RF performances for double delta-doped channel MESFETs are much improved than those of the conventional MESFET.

Abstract: We have investigated the influence of surface modification on the electrical properties of SiC diodes. Schottky diodes (SBDs) as well as PiN diodes were fabricated on n-type SiC substrate with an epilayer, and electrically characterized before and after high temperature annealing, and after removing the surface modified layer, respectively. The devices annealed without graphite cap layer showed ohmic behavior. The surface layer was modified to a conductive layer possibly due to the preferred sublimation of Si species. In order to confirm the existence of modified surface conductive layer, diode was fabricated on the same substrate and electrically characterized after removing 30nm-thick damaged layer by ICP-RIE. The leakage current reduced dramatically, as much as 7 orders of magnitude. The PiN diodes fabricated on the damaged surface layer showed the reverse leakage current and the breakdown voltage of 50mA and 1250V, respectively. While those of the diode fabricated after removing the damaged surface layer were 200nA at the breakdown voltage of 2100V, respectively.

Abstract: The initial homoepitaxial growth behavior on nearly on-axis 4H-SiC substrates was investigated. We have observed circular etch pits on the surface of on-axis substrate in the presence of source gases. However, there were no circular etch pits on the surface of off-axis substrates. In addition, the surface etched by H2 gas did not show circular etch pits even on nearly on-axis substrates. The shape of the circular etch pits was similar to spiral one. The initial growth behavior of epilayers was also investigated with various C/Si ratios of source gases (0.6

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