Papers by Author: Shigehiro Nishino

Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce AlN epitaxial layers. In this study, we report the surface morphology of AlN epitaxial layer grown on various substrates such as 3C-SiC (100), 4H-SiC (0001) with 8o off-axis (0001) plane tilted toward the <11 2 0> direction and on-axis 4H-SiC (0001). An average growth rate of AlN layer at 2350oC in 500 Torr of N2 was measured to be about 6μm/hr. While AlN layer grown on the 3C-SiC (100) substrate at 2350oC exhibited polycrystalline structure, AlN epitaxial layer grown on on-axis and off-axis 4H-SiC (0001) substrates had highly c-axis oriented epitaxial structure. In particular, the stacked structure of hexagonal plates was observed on off-axis substrate and the size of the hexagonal plates increased with growth time. Hexagonal plates were observed to be coalesced and the step-bunching was finally disappeared.

Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.

Abstract: A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. We aimed to systematically investigate the dependence of SiC epilayer quality and growth rate during the sublimation growth using the CST method on various process parameters such as the growth temperature and working pressure. The etched surface of a SiC epitaxial layer grown with low growth rate (30 μm/h) exhibited a low etch pit density (EPD) of ~2000 /cm2 and a low micropipe density (MPD) of 2 /cm2. The etched surface of a SiC epitaxial layer grown with a high growth rate (above 100 μm/h) contained a high EPD of ~3500 /cm2 and a high MPD of ~500 /cm2, which indicates that high growth rate aids the formation of dislocations and micropipes in the epitaxial layer.

Abstract: Investigation of the multilayer 6H(n+)/3C(n)/6H(p+)-SiC heterostructure grown by sublimation epitaxy show that the injection electroluminescence (IEL) in the green region (hνmax≈2.30-2.35eV) of spectrum is dominant. This band is close to the electroluminescence peak due to defects in 6H-SiC but also can be due to free exciton annihilation in a quantum well in 3C-SiC at the 6H/3C-SiC heterointerface. At high current the IEL peak at hνmax≈2.9 eV is found. This peak (and also two another peaks in blue part of spectra: hνmax≈2.6 eV and hνmax≈2.72 eV) can be attributed to recombination in 6H-SiC. The forward current-voltage characteristics for best structures are close to those for ideal 6H-SiC pn homostructure and characterized by abrupt breakdown. A lot of structures are characterized by barrier type excess current. Structure in the region of evident 3C-SiC inclusion is characterized by high forward and reverse excess currents.

Abstract: Investigations were carried out to achieve high performance Silicon Carbide Metal-Oxide-Semiconductor device structures. 4H-SiC/SiO2 interface was prepared by growing amorphous SiO2 layers by an alternate low temperature atmospheric CVD technique using TEOS as source material and the interface properties were compared with the one prepared by conventional thermal oxidation technique. The low temperature CVD technique offered the improvement of the interface properties with reduced Dit in comparison with thermally oxidized interface. As a new attempt, an in situ post growth annealing technique in N2 atmosphere was carried out to reduce the Dit further. Both the CVD technique and the in situ annealing processes that were used in the present study have been identified to be potential approaches to improve the interface quality.

Abstract: Most of the ion implanter is large scale, high acceleration voltage and expensive. For research and development, such a huge implanter is not required. Our motivation is to make desktop type ion implanter for SiC device. We report the fabrication of a compact 100 kV ion implanter. In order to miniaturize the equipment, an ion source, an accelerator tube and a main chamber were vertically arranged. We implanted Argon (Ar) and Nitrogen (N) ions to 6H-SiC substrate and the implanted 6H-SiC substrates were characterized by Fourier Transform Infrared Spectrometer (FTIR), Rutherford Backscattering Spectrometry (RBS) and Secondary Ion Mass Spectrometry (SIMS). In this report, concept of desktop ion implanter, evaluation of implanted substrate and its device application are presented. In order to characterize capability, with using the newly made compact ion implanter, it was possible to make implantation on SiC to get amorphous layer suitable for deices.

Abstract: For preliminary step toward fabrication of MOSFET using 4H-SiC 8) 3 (03 prepared by sublimation method, epitaxial growth of device quality 4H-SiC on 4H-SiC (0001) 8.0° off substrate was carried out and investigated. Smooth and specular surface of 4H-SiC (0001) plane was obtained by optimum growth condition. And epitaxial growth on 4H-SiC 8) 3 (03 and ) 8 3 (03 substrates were carried out with optimum growth conditions of 4H-SiC (0001). Smooth and specular surface was obtained on 4H-SiC 8) 3 (03 and ) 8 3 (03 plane. Growth rate of epilayers of 4H-SiC (0001), 8) 3 (03 and ) 8 3 (03 face were same. Oxidation rate of 4H-SiC (0001), ) 1 (000 , 8) 3 (03 and ) 8 3 (03 face was investigated. The oxidation rate was different depending on the faces. It was observed that the difference of oxidation rate of 8) 3 (03 and ) 8 3 (03 is mainly due to the difference of polarity similar to the case of reported for (0001) and ) 1 (000 .

Abstract: The preparation of porous 4H-SiC by electrochemical etching of SiC crystals was investigated. The porous layer was created at the porous SiC (PSC)/SiC interface but not from the SiC/electrolyte interface. The nanopores at the adjacent region of PSC/SiC interface were bigger than those at the top region. In the visible light region, the optical reflectance from PSC exhibits interference fringes. In the Reststrahlen region, the fourier transform infrared (FTIR) reflectance of porous 4H-SiC shows a splitting into more bands: a broad band with high reflectivity at low frequency and several sharp peaks near the LO frequency. The width and shape of FTIR spectra depended on the anodization current density. The anodization current density is a crucial parameter which determined the porosity, porosity depth profile, and the thickness of PSC layers. A pore transformation of porous structure was observed after chemical vapor deposition process.

Abstract: The selective growth of Si column was carried out by depositing Au on patterned Si (111) substrate as a solvent in chemical vapor transport method by using halides (HCl). The Si column was produced by VLS mechanism. The column was covered with SiC by conventional CVD process using HMDS ( Hexamethyldisilane ). Carbon Nano Tube ( CNT ) was deposited on Si column covered with SiC by DC assisted µ-wave plasma CVD.

Abstract: The pendeo epitaxial growth has been applied for the growth of 3C-SiC on (001) Si substrates. This growth was performed by VPE using hexamethyldisilane (HMDS) as a source gas. To characterize the crystallinity of the seed 3C-SiC and the pendeo epitaxial layer, the high resolution transmission electron microscopic (HRTEM) analysis was carried out. In the vertically grown layer on the seed 3C-SiC, the high-defect-density regions were observed. On the contrary, the low-defect-density regions were observed in the laterally grown layer. It was revealed from the TEM observations that lattice information can be transferred through the seed 3C-SiC while defects can be prevented from propagating into the epitaxial layer due to the presence of the air gap.