Papers by Keyword: SOI

Abstract: The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

Abstract: A semi-analytical model which is applicable to description of ballistic field-effect transistors with low-dimensional channels is proposed. For instance, such transistors can be manufactured on a “silicon-on-insulator” wafer. The model accounts for single-gate and double-gate structures with one-dimensional and two-dimensional channels. It differently describes the regimes of a transistor above threshold and below threshold. The first implies an essential influence of charge inside the channel on a potential distribution; the second supposes a negligible charge inside the channel. Both approaches are mainly based upon an approximate solution of the Poisson equation.

Abstract: Theoretical model of thin film SOI MISFET based on the gate control of impact ionization avalanche in the drain induced p-n+ junction is developed. Such operation principle opens a way of the creation of transistors with high transconductance and operation frequency, and switching between the ON and OFF states by low gate voltage variation.

Abstract: We report our efforts towards designing and fabricating capacitive microaccelerometers with flat bottom surfaces free from the notching effects of Deep Reactive Ion Etching (DRIE) based on SOI process. The substrate layer under the device structure is etched and a metal film is deposited to the backside of moving structure for protecting the bottom surfaces so that the stiction problem and notching effects are avoided. The test results demonstrate that SOI accelerometers have been released successfully. The measured sensitivity is 169.1mV/g and the linearity of output is within 0.202%.

Abstract: TPMS (Tire Pressure Monitoring System) has played a more and more significant role in safely driving nowadays. Low power consumption and excellent accuracy are two of the most important parameters. In this paper, a TPMS with driving status judgment and low-power measurement is designed and realized. A vibration switch is applied to judge the different status of running and stopping. Based on the judgment of driving status, pressure and temperature, different operations will be carried out in order to achieve lower power consumption. The whole system is working intermittently. It has a good performance with a theoretical lifespan of 2 years. The tested communication distance is more than 30m and the resolution is better than 4KPa. A MEMS pressure sensor using SOI wafer with high consistency and accuracy for this TPMS is designed and fabricated. Deep trench etching is adopted to make pressure reference cavity. The ratio of sensitivity variance to its average is 3.5%, which illustrates a good consistency. The total accuracy of the sensor is better than 0.3% and the nonlinearity is less than 0.2%.

Abstract: A novel two step etch process using the Bosch-etch mechanism to prevent notching on an SOI wafer is presented. The first etch step is used to attain the maximum etch depth with high etch rate and stop before the buried oxide (BOX). Followed by the second etch step with lower etch rate and tuned to soft land on the BOX to etch the remaining depth. In addition to that it is tailored to also provide a tapered etch profile which is beneficial in reducing the notch if over etching occurs.

Abstract: A three-axis capacitive accelerometer based on SOI is presented. Acceleration is detected by both in-plane and vertical comb electrodes. Separating the three-axis sensing with different groups of comb electrodes enables direct detection for each axis with full differential capacitive sensing scheme. The capacitance sensitivities of X and Y accelerometer are 160.7 fF/g and Z accelerometer 21.6 fF/g.

Abstract: Small single-electron devices (SEDs) consisting of many Si nanodots are fabricated on a silicon-on-insulator (SOI) wafer by means of pattern-dependent oxidation (PADOX) method. We investigated SEDs from two kinds of viewpoint. One is how to fabricate the nanodots, especially coupled nanodots, which are important to achieve quantum computers and single-electron transfer devices. The other is demonstration of new applications that tolerate the size fluctuation. In order to achieve multi-coupled nanodots, we developed an easy method by applying PADOX to a specially designed Si nanowire which has small constrictions at the ends of the wire. We confirmed the double-dot formation and position of the Si nanodots in the wire by analyzing the measured electrical characteristics. To achieve high functionality together with low-power consumption and tolerance to size fluctuation, we developed nanodot array device which has many input gates and outputs terminals. The fabricated three-input and two-output nanodot device actually provide high functionality such as a half adder and a full adder.

Abstract: The threshold voltage (Vth) variability in fully depleted SOI MOSFETs with intrinsic channel and ultrathin buried oxide under back bias voltage (Vbs) is extensively investigated by three dimensional device simulation. It is found that the Vth variability increases only slightly by applying negative Vbs by the effect of random dopant fluctuation (RDF) in the substrate, while the Vth variability is severely degraded by applying positive Vbs by the effect of the back interface inversion. As a result, there is a certain value of Vbs around 0 V where the Vth variability is minimized.

Abstract: With the different sizes of the structure parameters of the SOI(Silicon on Insulator) rib waveguide, the dispersion and the nonlinearity parameters are investiaged using the beam propagation method. It is found that for the same structure parameters, the dispersion and the nonlinearity parameter γ are different between the TE and TM modes. With the changing of the structure parameters the anomalous dispersion and the nonlinearity parameter γ can be up to 972 ps/km/nm and 1.065×10⁶w^-1.km^-1 in the wavelength region near 1550nm.The high anomalous dispersion and the nonlinearity parameter γ means it’s a good candidate to realize parametric amplification and wavelength conversion.