FPGA-Based Design of Resource-Efficient Digital down Converter

Abstract:

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Digital down converter (DDC) is based on the theory of Software Defined Radio (SDR) and multirate signal processing, extensively applied in digital receivers of communications systems. An improved resource-efficient DDC with polyphase architecture and distributed arithmetic (DA) is presented in this paper. The design based on Xilinx FPGA Virtex-5 has more flexible characters and higher precision computation with less resource consumption.

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Periodical:

Edited by:

Zhixiang Hou

Pages:

878-881

DOI:

10.4028/www.scientific.net/AMM.128-129.878

Citation:

S. L. Cui and X. Li, "FPGA-Based Design of Resource-Efficient Digital down Converter", Applied Mechanics and Materials, Vols. 128-129, pp. 878-881, 2012

Online since:

October 2011

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$35.00

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