Design Method of DLMS Adaptive Filter Based on FPGA

Abstract:

This paper proposed DLMS algorithm which is suitable for real-time signal processing. The algorithm adopts hardware multiplier and pipeline technology to accelerate the operation of the system. By analyzing the time sequence and spectrum of the output signals, the attenuation of the interference signals is about 51dB. It can further demonstrate the high quality and high speed of the DLMS algorithm to filter out the interference signals, and well handle the relationship between the resources and speed of FPGA to meet the requirements of high-speed signal processing.

• Periodical: Applied Mechanics and Materials (Volumes 182-183)
• Pages: 685-689
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.182-183.685
• Online since: June 2012
• Authors: Jing Dai, Rui Zhou, Shi Tang
• Keywords: Adaptive Filter, Delayed-LMS, Field-Programmable Gate Array (FPGA), MATLAB

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